AN AUTOMATED APPROACH TO A 90 NM CMOS DRFM DSSM CIRCUIT DESIGN
A digital single sideband modulator (DSSM) for a digital radio frequency memory (DRFM) was designed and implemented in a commercial 90-nm radiation-hardenedby-design (RHBD) structured ASIC by Thomas Pemberton in [1]. This thesis synthesized the same DSSM structure in a non-hardened 90-nm commercial process and compared the synthesis results of the two for power, delay, and area. The number of I/O bits and taps in [1] and this thesis were purposely made high to create a large target for radiation testing. As should be expected, the RHBD DSSM reported greater power and area. However, the RHBD power models were only estimates. This thesis also showed the costs and benefits for varying bit widths, number of filter taps, and ROM sizes in the DSSM, synthesized at a typical characterization corner. One of the designs was also synthesized at two more characterization corners. Finally, another design variation was tested with extra piping in the Hilbert filter. All of these circuits were measured for power, timing, critical path, area, and spur-free dynamic range (SFDR).
Click here for free
download this paper
CSE PROJECTS