CMOS rail–to–rail IO OpAmp
250 MHz CMOS rail–to–rail IO OpAmp: Structural design approach
FREE-DOWNLOAD V Ivanov… – … 2002. ESSCIRC 2002
The key goals in this OpAmp design were: rail-to-rail IO capability, speed (bandwidth and settling
time), load drive (150 Ohm/100 mA max), DC gain, gain/phase error in video band
(0.1%/0.1o), low noise and low current consumption. These demands leaded to the circuit