Energy Optimization of Subthreshold Voltage Sensor Network Processors
Sensor network processors and their applications are a growing area of focus in computer system research and design. Inherent to this design space is a reduced processing performance requirement and extremely high energy constraints, such that sensor network processors must execute low-performance tasks for long durations on small energy supplies. In this paper, we demonstrate that subthreshold-voltage circuit design (400 mV and below) lends itself well to the performance and energy demands of sensor network processors. Moreover, we show that the landscape for microarchitectural energy optimization dramatically changes in the subthreshold domain. The dominance of leakage power in the subthreshold regime demands architectures that i) reduce overall area, ii) increase the utility of transistors, while iii) maintaining acceptable CPI efficiency. We confirm these observations by performing SPICE-level analysis of 21 sensor network processors and memory architectures. Our best sensor platform, implemented in 130nm CMOS and operating at 235 mV, only consumes 1.38 pJ/instruction, nearly an order of magnitude less energy than previously published sensor network processor results. This design, accompanied by bulk-silicon solar cells for energy scavenging, has been manufactured by IBM and is currently being tested.
Sensor network processing is emerging as a new frontier of computer system design. Sensor network processors combine sensing, computation, and communication into small battery-powered form factors that can be placed into the environments that they monitor [8, 15]. Sensor networking applications span a vast range, from medical monitoring applications, to environmental sensing, to industrial inspection, and military surveillance [7]. Sensor platforms carry with them a number of form factor requirements that place heavy constraints on the energy available for computation [12, 15]. First, many applications require a sensor node that is very small in size. For example, an eyeball activity monitor must be small enough to be embedded into the epidermis of the eyeball. Second, sensor network processors must carry their energy supplies within this small form factor, in the form of batteries or apparatus appropriate to scavenge energy, such as a solar cell. In either case, the quantity of energy available to sensor application processing is quite limited. For example, a 2g vanadium oxide battery contains 720 mA-hr of energy, enough to power ARM, Ltd’s most energy-efficient ARM 720T processor at 100MHz for 45 hrs [1]. Certainly, this energy payload is not sufficient for long-term sensing applications, such as a heart monitor for which installation requires surgery. Fortunately, the energy demands of sensor processing platforms are mitigated by their modest processing demands [6, 10]. For example, a blood pressure monitor sensor requires a sensing capability of approximately 800 bps. Passing the sensing data to a software-based digital threshold monitor, which watches for high or low blood pressure events, would require about 10,000 instructions per second processing power. Higher-rate natural data streams, such as electrical signals from the human brain, are generated at data rates of about 3,200 bps. Even these higher-rate signals could be processed by a digital filter, analyzed with a threshold monitor and compressed for storage with less than 56,000 instructions per second. Given the low computational demands of many sensor networking applications, there is a significant opportunity to reduce processing energy demands through low-frequency, low-voltage designs.
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