ENGINEERING RESEARCH PAPERS

fpga IEEE PAPER 2017




Design and Comparative Evaluation of GPGPU-and FPGA-based MPSoC ECU Architectures for Secure, Dependable, and Real-Time Automotive CPS
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Abstract In this paper, we propose and implement two electronic control unit (ECU) architectures for real-time automotive cyber-physical systems that incorporate security and dependability primitives with low resources and energy overhead. These ECUs

Secure Function Evaluation Using an FPGA Overlay Architecture.
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ABSTRACT Secure Function Evaluation (SFE) has received considerable attention recently due to the massive collection and mining of personal data over the Internet, but large computational costs still render it impractical. In this paper, we leverage hardware

ESE: Efficient Speech Recognition Engine with Sparse LSTM on FPGA.
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ABSTRACT Long Short-Term Memory (LSTM) is widely used in speech recognition. In order to achieve higher prediction accuracy, machine learning scientists have built increasingly larger models. Such large models are both computation and memory intensive. Deploying

A VME and FPGA Based Data Acquisition System for Intensity Monitors
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Abstract A universal data acquisition system supporting toroids, DCCTs, Faraday cups, srapers and other types of instrumentation has been developed for reporting beam intensity measurements to the Fermilab Accelerator Controls System (ACNet). Instances of this front

Quick Diagnosis of Short Circuit Faults in Cascaded H-Bridge Multilevel Inverters using FPGA
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Abstract Fast and accurate fault detection is the primary step and one of the most important tasks in fault tolerant converters. In this paper, a fast and simple method is proposed to detect and diagnosis the faulty cell in a cascaded H-bridge multilevel inverter under a short

Frequency Domain Acceleration of Convolutional Neural Networks on CPU-FPGA Shared Memory System.
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Experiments and Results Page 10. 10 State of the art on FPGAConvolutional layer occupies over 90% of the total computation time. Most previous work focus on using highly optimized hardware to accelerate the VGG16 CONV Layer (GFLOP) Space Convolution Overlap-and-Add

Corolla: GPU-Accelerated FPGA Routing Based on Subgraph Dynamic Expansion.
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Page 1. Corolla: GPU-Accelerated FPGA Routing Based on Subgraph Dynamic Expansion Minghua Shen and Guojie Luo FPGA-February 23, 2017 Peking University 1 Page 2.Motivation BackgroundSearch Space Reduction for Routing Evaluation and Conclusion Contents 2 Page

A Parallel Bandit-Based Approach for Autotuning FPGA Compilation.
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Abstract Mainstream FPGA CAD tools provide an extensive collection of optimization options that have a significant impact on the quality of the final design. These options together create an enormous and complex design space that cannot effectively be explored by human effort

Improving the Performance of OpenCL-based FPGA Accelerator for Convolutional Neural Network.
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Abstract OpenCL FPGA has recently gained great popularity with emerging needs for workload acceleration such as Convolutional Neural Network (CNN), which is the most popular deep learning architecture in the domain of computer vision. While OpenCL

Boosting the Performance of FPGA-based Graph Processor using Hybrid Memory Cube: A Case for Breadth First Search.
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Abstract Large graph processing has gained great attention in recent years due to its broad applicability from machine learning to social science. Large real-world graphs, however, are inherently difficult to process efficiently, not only due to their large memory footprint, but also

FPGA Control of Coherent Pulse Stacking
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Abstract Coherent pulse stacking (CPS) is a new time-domain coherent addition technique that stacks several optical pulses into a single output pulse, enabling high pulse energy from fiber lasers. Due to advantages of precise timing and fast processing, we use an FPGA to

Performance Analysis of Video PHY Controller Using Unidirection and Bi-directional IO Standard via 7 Series FPGA
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Abstract The Video PHY controller offers an interface between transmitters/receivers and video ports. These video ports are categorized in HDMI or Displayport. HDMI Video PHY controller are mostly used for their high speed operation for high resolution graphics.

Design and implementation of Four-Phase Sequences on FPGA using Modified Particle Swarm Optimization for Radar Applications
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Abstract: Radar applications require sequences with individually peaky autocorrelation and low cross-correlation. Obtaining such sequences is a combinatorial problem. Thus the problem of signal design mentioned above is a challenging task for which many global

FPGA-based Real Time Implementation for Direction-of-Arrival Estimation
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Abstract: Direction-of-arrival (DOA) estimation of radio signals is of utmost importance in many commercial and military applications. In this study, the authors propose an efficient field-programmable gate array (FPGA) architecture for implementing a recently published

Acceleration of Frequent Itemset Mining on FPGA Using SDAccel and Vivado HLS
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Abstract Frequent itemset mining (FIM) is a widely-used data-mining technique for discovering sets of frequentlyoccurring items in large databases. However, FIM is highly timeconsuming when datasets grow in size. FPGAs have shown great promise for

On FPGA Implementation of a Continuous-Discrete Time Observer for Sensorless Induction Machine using Simulink HDL Coder
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Abstract This paper deals with the design of a continuousdiscrete time high gain observer (CDHGO) for sensorless control of an induction machine (IM). Only two weakly sampled stator current measurements are used to achieve a real-time estimation of the rotor flux, the

Safety in Operation Logic FPGA Approach
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Abstract Manual Safety Logic Unit implements the interlocks using Field Programmable Gate Array (FPGA) for safe operation of Fuel Handling components of Advanced Heavy Water Reactor (AHWR). The interlocks have been designed to prevent any maloperation

ForeGraph: Exploring Large-scale Graph Processing on Multi-FPGA Architecture
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ABSTRACT The performance of large-scale graph processing suffers from challenges including poor locality, lack of scalability, random access pattern, and heavy data conflicts. Some characteristics of FPGA make it a promising solution to accelerate various Abstract. Virtual FPGAs add the benefits of increased flexibility and application portability on bitstream level across any underlying commercial off-the-shelf FPGAs at the expense of additional area and delay overhead. Hence it becomes a priority to tune the architecture

FPGA Controlled Five-Level Soft Switching Full Bridge DC-DC Converter Topology.
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The use of conventional dc-dc converter is likely to decrease the efficiency because of the hard switching, which generates switching losses during switching on/off states. The proposed converter has the following desirable features: It requires only five control switches

Performance Analysis of Algorithms over FPGA for Removing of Impulse Noise
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ABSTRACT This paper presented a novel approach in detection of impulse noise based on the entropy of the pixels. Then the detected noisy pixels is replaced with the output of the vector median filter (VMF). Performance is carried out using filters described widely in the

Power Flow Management for the Fuel Cell Hybrid Electrical Vehicle Based on State Logic Controller Algorithm implemented in FPGA Environment
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Abstract A power flow management based on State Logic Control (SLC) for the hydrogen fuel cell hybrid electric vehicle (FCEV) is proposed in this paper. To improve the dynamic response of the fuel cell generator and reduce the fuel consumption the developed hybrid

Self-Adaptive FPGA-Based Image Processing Filters Using Approximate Arithmetics
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Portable battery-powered devices Rapid workload

The Design and Implementation of Gated Service Polling System Based on FPGA
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Abstract The polling control strategy is a kind theory of important resource allocation scheduling. Because of its equity, flexibility, efficiency and practicality, etc, it has been widely used in industrial process control, traffic control, communication network, and so on. This

FPGA Based Implementation of the Push-Pull Configuration of a Single Phase Multilevel Inverter with a Novel PWM Technique
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Abstract: This paper presents a new topology for a multilevel inverter, which consists of a single dc voltage source with a series of capacitors, power switches and a mid-point transformer to demonstrate the operation of a five level inverter. A SPARTAN 3E field

FPGA Based Motion Tracking System
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Abstract: This paper uses computer vision and embedded system technologies to track moving objects in real time video streams using Field Programmable Gate Array (FPGA). Several algorithms are used in this paper in order to improve the tracking and recognition

The Development of Tune Measurement System Based on FPGA at HLSII Storage Ring
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Abstract A tune measurement system based on FPGA development board is developed at HLS II. The FPGA development board based on Zynq SOC, have ADC and DAC on board. The FPGA can provide two kinds of signal for exciting the beam: parametric frequency

Implementation of Pipelined FFT Processor on FPGA Microchip Proposed for Mechanical Applications
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ABSTRACT Fast Fourier transform (FFT) is an efficient algorithm for discrete Fourier transform (DFT) which computes any signal in time domain into frequency domain. FFT processor is a hardware implementation for FFT algorithm. This processor is widely used in

FPGA Implementation of Viterbi Decoder for Long Survivor Path
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Abstract: Viterbi decoder in wireless communication is always required especially demanded for high speed, low power and low cost. In this paper, we propose to design a Viterbi decoder that uses survivor path for wireless communication in an attempt to reduce

Reconfigurable Real Time Signal Capturing through FPGA
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Abstract Today all communication systems are prototyped on FPGAs before sending them for ASIC backend and fabrication. On other side the FPGAs with million gate logic densities and embedded block RAMs allowed the high speed signal capturing and storage for real

A Literature Survey of FPGA Implementation of Inverter Techniques
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ABSTRACT-This paper reviews state of the art of multilevel inverter topologies using FGPA technology. Power electronics tools are which changes DC power to AC power at needed output voltage and frequency stage is known as inverters. Multilevel inverter has three

FPGA Implementation of Secret Data Sharing through Image by using LWT and LSB Steganography Technique
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Abstract: Security of information is very important in terms of communication and/or the secrecy of how to decode it. The enhancement of security system for secret data communication through encrypted data embedding in colour images is proposed. Initially

FPGA BASED RETINAL IMAGE SEGMENTATION USING AM
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Abstract:-Retinal image FPGA based segmentation is important for diagnosing various issues happens in eye. Retinal image segment is one among the crucial problems as a result of this image contains terribly little nerves and a few artifacts contribution in it. This Here at first, I would like to put down some motivations and general thoughts behind this book. During my past 10 years working period in mixed academic and industry environment, I had many technical discussions and leisure chats with global researchers and electronic

EVALUATION OF A LOW-POWER HADOOP CLUSTER BASED ON THE ZYNQ ARM-FPGA SOC
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Distributed computing is important to many web and scientific applications. The quest for lower power dissipation and energy consumption in distributed applications has led to the implementation of ARM processor based distributed systems. The advent of integrated

Performance Analysis of Hexagonal Node Design For Packet-Switched NoC on FPGA
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Abstract The NoC Architecture plays crucial role while designing communication systems for System on Chip (SoC). The NoC architecture is improved over conventional bus, shared bus design and cross bar interconnection architecture for on chip networks. In most of the NoC

A 3ps Resolution Time-to-digital Converter in Low-cost FPGA for Laser Rangefinder
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Abstract This paper concerns a new and accurate low cost time-to-digital converter (TDC) for laser rangefinder measurements systems. The proposed TDC system is based on a digital technique, which can be implemented on a single field programmable gate array

Implementation of Multi-FPGA Communication using Pulse-Coupled Phase Oscillators
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Abstract This paper proposes an implementation of multi-Field Programmable Gate Array (FPGA) communication using pulse-coupled phase oscillators. At first, we construct a digital phase oscillator circuit with adjustable in-phase parameters. While performing the This book is an attempt to overcome the gap between science and practice in the field of concurrent control systems specified by Petri nets. It combines theoretical aspects of concurrent systems (with the reference to algorithms and their computational complexity)

SF3: A Scalable and Flexible FPGA-Framework for Education and Rapid Prototyping
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Abstract Field Programmable Gate Arrays (FPGA) are becoming increasingly important in many digital systems due to their high performance and flexibility. The efficient utilization of programmable logic is still complex and requires in-depth knowledge. Therefore,

FPGA Realization for Baseline Wander Noise Cancellation of ECG Signals using Wavelet Transform
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ABSTRACT Baseline Wander (BW) is a common noise in electrocardiogram (ECG). To effectively correct and to preserve more underlying components of an ECG signal, a powerful tool for removal of BW noise from various signals was introduced. This paper

FPGA Implementation of a Real-Time Pedestrian Detection Processor Aided by E-HOG IP
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Abstract. This paper describes a real-time pedestrian detection processor of Field Programmable Gate Arrays (FPGA) using a novel structure aided by E-HOG IP. This structure proposes a three stages detection to reduce the amount of calculation and improve

Architecture Centric Coarse-Grained FPGA Overlays
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With the advancements in technology, parallel processing platforms such as graphics processing units (GPUs)[1, 2] and massively parallel processor arrays (MP-PAs)[3, 4, 5, 6] are gaining popularity for accelerated execution of computeintensive applications. However

FPGA BASED 2× 2 MMSE MIMO-OFDM SYSTEM USING XILINX SYSTEM GENERATOR
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Abstract: Multiple-input multiple-output orthogonal frequency division multiplexing (MIMO- OFDM) is a powerful technique to increase the capacity of wireless communication system and decrease the effect of selective fading to flat fading channel. In this paper 2× 2 MIMO-

A Low Cost FPGA based Cryptosystem Design for High Throughput Area Ratio
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Abstract Over many years, Field Programmable Gated Arrays (FPGA) have been used as a target device for various prototyping and cryptographic algorithm applications. Due to the parallel architecture of FPGAs, the flexibility of cryptographic algorithms can be exploited to

System Modeling of a large FPGA project: the SKA Tile Processing Module
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Abstract. Large projects like the SKA have an intrinsic complexity due to their scale. In this context, the application of a management design system becomes fundamental. For this purpose the SysML language, a UML customization for engineering applications, has been

Design of a High Speed Architecture of MQ-Coder for JPEG2000 on FPGA
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Abstract Digital imaging is omnipresent today. In many areas, digitized images replace their analog ancestors such as photographs or X-rays. The world of multimedia makes extensive use of image transfer and storage. The volume of these files is very high and the

FPGA Based Vedic Multiplier
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Abstract: FIR filters, Microprocessors, DSP and communication application Multipliers are used. To carry higher order multiplication number of adders and compressor required are more to carry out partial product addition. As the need of high speed processor are

FPGA-based Key Generator for the Niederreiter Cryptosystem using Binary Goppa Codes
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Abstract. This paper presents a post-quantum secure, efficient, and tunable FPGA implementation of the key-generation algorithm for the Niederreiter cryptosystem using binary Goppa codes. Our key-generator implementation requires as few as 896,052 cycles

Implementation of the RN Method on FPGA using Xilinx System Generator for Nonlinear System Regression
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Abstract In this paper, we propose a new approach aiming to ameliorate the performances of the regularization networks (RN) method and speed up its computation time. A considerable rapidity in totaling calculation time and high performance were accomplished

SafeDRP: Yet Another Way Toward Power-Equalized Designs in FPGA.
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Abstract. Side-channel analysis attacks, particularly power analysis attacks, have become one of the major threats, that hardware designers have to deal with. To defeat them, the majority of the known concepts are based on either masking, hiding, or rekeying (or a

Fixed and Floating Point Array Signal Processor Architecture Implemented on FPGA and their performance Comparisons
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Abstract Array Signal Processor or digital beamformer is an inevitable processing block in various antenna array signal processing applications including RADAR/SONAR, MIMO, medical imaging etc.. In high sampling rate applications like imaging SONAR digital

Hydro-Monitor and Quality Analysis Using FPGA: An Overview
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Hydro-Monitoris an innovative system that check the water and its physio-chemical properties in an electronically automated manner. This is not just testing the water properties and its features, ratherit also provides an automated system. Various physio-chemical

Scheduling Considerations for Voter Checking in FPGA-based TMR Systems
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Abstract Field-Programmable Gate Arrays (FPGAs) are susceptible to radiation-induced Single Event Upsets (SEUs). A common technique for dealing with SEUs is Triple Modular Redundancy (TMR) combined with Module-based configuration memory Error Recovery

FPGA IMPLEMENTATION OF DES ALGORITHM USING DNA CRYPTOGRAPHY.
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ABSTRACT DNA Cryptography is the evolving cryptanalytic technology in the field of information security. Using this Cryptanalytic technology which involves in DNA Cryptography improves the security level to protect information from attackers. However all

Modeling and FPGA implementation of a thermal peak detection unit for complex system design
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Abstract This paper, presents the modelization and the implementation of a thermal peak detection unit for complex system design. The modelization step starts with modeling the formula of the heat source using Simulink/Matlab tool, is the main objective of this work.

Implementation of Hough Transform Using Resource Efficient FPGA Architecture
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Abstract-Hough transform is used for detecting straight lines, circles in an image. To reduce the huge computations in Hough transform, I want to generate a resource efficient architecture and implement the Hough transform on an FPGA. Resource efficient and

Implementation of Advanced Encryption Standard (AES) on FPGA
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Abstract: A high speed security algorithm is always necessary and important for wired/wireless communication. One of the best existing symmetric security algorithms to give information security is advanced encryption standard (AES). The significance of

FPGA IMPLEMENTATION OF CRYPTOGRAPHIC SYSTEMS FOR SYMMETRIC ENCRYPTION.
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ABSTRACT In this proposed work, implemented a cryptographic system for symmetric encryption and hamming code for error detection and correction. Symmetric key is using same duplicate data ie key data for both encryption and decryption. In this encryption and

Design Considerations when Accelerating an FPGA-Based Digital Microphone Array for Sound-Source Localization
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Abstract: The use of microphone arrays for sound-source localization is a well-researched topic. The response of such sensor arrays is dependent on the quantity of microphones operating on the array. A higher number of microphones, however, increases the

Design Trade-offs in Configurable FPGA Architectures for K-Means Clustering
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Abstract: K-Means clustering is a popular technique for data partitioning, frequently used in data mining. The simple control flow, and high degree of parallelism, makes it a good candidate for FPGA acceleration. We propose a highly configurable architecture, based on

FPGA-based digital back-ends for the Sardinia Radio Telescope
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Abstract. The Sardinia Radio Telescope (SRT), located in San Basilio, about 35 km north of Cagliari, is the largest (64-m diameter) radio telescope in Italy. It is a general-purpose, fully- steerable radio telescope designed to operate in the 300 MHz-116 GHz frequency range,

ECC design strategy targeting area optimization in reconfigurable device (FPGA) using VLSI Technique
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Abstract Forward error correction (FEC) plays an important role in the field of telecommunication and information theory as it improves the capacity of a channel. It has been observed that Reed Solomon Error Corrector is a powerful method for error detection

Design and Implementation of Pipelined 8-Bit RISC Processor using Verilog HDL on FPGA
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Abstract-This paper describes an eight-bit RISC processor design, the usage of Verilog hardware Description Language (HDL) on FPGA board. The proposed 8-bit RISC processor may be carried out with the help of separate data and instruction memory ie Harvard

FPGA based control systems for space instrumentation: examples from the IAPS experience
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Abstract. INAF IAPS research groups have a long time expertise in the production of scientific instrumentation for space missions. Thanks to ASI funding and in collaboration with the national industries leader in the space sector, IAPS, the Institute for Space Astrophisics

FPGA Implementation of Variable-Length Split-Radix FFT Algorithm
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Abstract: In this study, an FPGA implementation of a programmable length Fast Fourier Transform (FFT) is presented. The proposed implementation uses a pipelined Split-Radix FFT structure to support FFT lengths from 8 to 1024 with real and complex inputs as

FPGA Based Real Time Wireless Communication for Tele Health Using Android Phone
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ABSTRACT In order to enhance the peoples health, real time wireless communication system is introduced to monitor the patients pulse by using an Android OS through FPGA. The end user receive the monitored data by means of GPRS, a wireless communication

FPGA based reconfigurable system to testSystem level designby testbench methodology
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Without Support of Mr. Rakesh Mehta, my friend, a philosopher in this area of work, who never differed nights from the day while working with me and left no stone unturned while extending the support. Thanks also go to his team, for their constant support throughout

OpenMP device offloading to FPGA accelerators
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Abstract Future high-performance computing systems will need to include multiple specialized accelerators in a single heterogeneous system to overcome power-density limitations of CPU performance. To program such heterogeneous systems without the need to maintain multiple

A FPGA-based digital readout system for a multi-channel X and gamma-ray spectrometer
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Abstract. The XGS project aims to develop a multi-channel broadband X and γ-ray spectrometer for space applications. The experiment envisages the use of solid-state Silicon Drift Detectors coupled to inorganic scintillator bars. A prototype is under development in the

Developments of FPGA-based digital back-ends for low frequency antenna arrays at Medicina radio telescopes
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Abstract. In radio astronomy Field Programmable Gate Array (FPGA) technology is largely used for the implementation of digital signal processing techniques applied to antenna arrays. This is mainly due to the good trade-off among computing resources, power

FPGA-Based Real-Time SLAM
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Abstract This project created a proof of concept SLAM sensor suite capable of remotely observing and mapping areas by combining real-time stereo camera imagery with distance measurements and localization data to generate a 3D depth map and 2D floorplan of its

On the FPGA Implementation of the VR-RLS Algorithms
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Abstract This paper presents the main elements proposed for an efficient implementation on Field Programmable Gate Array (FPGA) of our novel Variable-Regularized Recursive Least Squares (VR-RLS) algorithm. The followed performance axes are the overall

Software Design of Digital Receiver using FPGA
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Abstract In the past radio receivers were designed with analog circuitry but for overcoming the disadvantages of analog circuitry now all becomes all digitized. So Wireless communication have a great demand in todays world. The digital receiver must be

Sewage Poisonous Gas Monitoring Using FPGA
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ABSTRACT In fast moving world, people are keener on developing and solving technological problems, they dont consider about the minor issues which could drown human lives. One of such inconspicuous social is poisonous gas which leads to many sewer

A Bottom-up Approach for Visual Object Recognition on FPGA based Embedded Multiprocessor Architecture
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Abstract This paper presents an object recognition approach of outdoor autonomous systems identifying the nature of the interested object when observing an image. Therefore, seeking for effective and robust recognition method, the proposed approach is performed

Implementation of Image Compression algorithm on FPGA
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Abstract The discrete cosine transform is a fast transform. It is a widely used and robust method for image compression. It has excellent compaction for highly correlated data. DCT has fixed basis images DCT gives good compromise between information packing ability

Implementation of Area Efficient 128-bit Based AES Algorithm in FPGA
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ABSTRACT Advanced Encryption Standard is the most widely used Symmetric cipher today. The algorithm uses a combination of Exclusive-OR operations (XOR), octet substitution with an S-box, row and column rotations, and a Mix Column. An adjusted engineering for AES

FPGA BASED RECONFIGURABLE COMPUTATION UNIT FOR DSP APPLICATIONS
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Abstract-This paper presents the architecture of a reconfigurable and high performance computation unit for DSP applications called Reconfigurable Computation Unit. The architecture operates based on fast Carry-Save (CS) arithmetic. A multirate processor

FPGA IMPLEMENTATION OF WELCH-GONG STREAM CIPHER USING VLM3 ALGORITHM
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Abstract-WG stream ciphers generate key bit-stream based on Welch-Gong (WG) transformation whose hardware cost is dominated by its transforms field multipliers. Montgomery modular multiplication is an efficient method for hardware implementation of

A Proposal for the Secure Activation and Licensing of FPGA IP Cores.
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Abstract The fabless business model is leading to intellectual property (IP) based design for System-on-chip devices, involving both the field programmable gate array (FPGA) and application specific integrated circuit (ASIC) technology. The main advantage is essentially

Cholesterol Detection from the Blood Sample using FPGA Based Instrumentation
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Abstract: Researchers find FPGA based instrumentation to carry out processing of physical quantities. The newer trend is to use FPGA counter parts when compared to using programmable devices as these devices are very fast in response and involves hard wired

FPGA IMPLEMENTATION OF HIGH SPEED MEDICAL IMAGE SEGMENTATION USING GENETIC ALGORITHM.
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ABSTRACT Nowadays, image analysis plays a key role in processing of the medical images such as retinal image, cardiac image and brain MRI images in bio-medical field. Medical Image Segmentation (MIS) is a process of obtaining the different intensity levels of the image

An Efficient Multichannel FIR Filter Architecture for FPGA and ASIC Realizations
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Abstract In this paper, a Time division multiplexing (TDM) based multichannel FIR filter architecture is proposed using a single multiplier and adder irrespective of number of channels and taps using the concept of resource sharing principle. For efficient optimization

Traffic Light Controller based on FPGA
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Abstract-Traffic light control systems are widely used to monitor and control the movement of automobiles at the junction of several roads. Traffic signals are essential to guarantee safe driving at road intersections and aim to realize smooth movement of vehicles. But there is an

FPGA Implementation of MC-CDMA Wireless Communication System Based on SDR-A Review
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The wireless communications revolution started with the mobile phone at the beginning of the 80s and all the improvements which have led to the multiplication of mobile and wireless communications networks and standards [1]. The 1st Generation (1G) of technology was

FPGA Implementation of Digital Modulation Techniques BPSK and QPSK using HDL Verilog
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ABSTRACT In the wireless communication system, to transfer the data without loss and to reduce size of antenna, modulation is the most important technique. Phase-shift keying (PSK) is a modulation technique in which the phase of a transmitted signal varies to convey

Deep Learning Binary Neural Network on an FPGA
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Abstract In recent years, deep neural networks have attracted lots of attentions in the field of computer vision and artificial intelligence. Convolutional neural network exploits spatial correlations in an input image by performing convolution operations in local receptive fields.

Leading the Blind: Automated Transistor-Level Modeling for FPGA Architects
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Abstract The design and development of innovative FPGA architectures hinge on the flexibility of its toolchain. Retargetable toolchains, like the Verilog-to-Routing (VTR) flow, have been developed to enable the testing of new FPGAs by mapping circuits onto easily-

Implementation of Direct Sequence Spread Spectrum Communication System Using FPGA
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Abstract This paper presents the designed and implementation of spread spectrum technology for data transfer to overcome the interference problems associated with narrow band, very high frequency and ultra high frequency data transfer systems. The spread

Estimation of Cosmic Ray Induced Background and a FPGA-Based Data Compression Algorithm for DeeMe Experiment
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Abstract DeeMe experiment which is an experiment searching for muon to electron conversion (µ-e conversion) will be conducted at J-PARC Materials and Life Science Experimental Facility (MLF). The µ-e conversion in the nuclear field, µ−+ N→ e−+ N, is one

FPGA Implementable Frame Synchronization Algorithm for Burst Mode GMSK
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In time division multiple access (TDMA) communication systems, correctly estimating the synchronization parameters is very important for reliable data transfer. The algorithms used for frequency/phase and symbol timing estimates are generally accepted as knowing the

FPGA Implementation of High Speed AMBA Bus Architecture for Image Transmission and Face Detection
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Abstract-AMBA remains for Advanced Microcontroller Bus Architecture which is chiefly utilized for information synchronization between various sensors and additionally actuators and primary handling units. Typically the working pace of primary handling unit is

FPGA applications for single dish activity at Medicina radio telescopes
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Abstract. FPGA technologies are gaining major attention in the recent years in the field of radio astronomy. At Medicina radio telescopes, FPGAs have been used in the last ten years for a number of purposes and in this article we will take into exam the applications

Design and implementation of projects with Xilinx Zynq FPGA: a practical case
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Abstract. The main advantage when using FPGAs with embedded processors is the availability of additional several high-performance resources in the same physical device. Moreover, the FPGA programmability allows for connect custom peripherals. Xilinx have

AN EFFICIENT VLSI ARCHITECTURE FOR AES AND its FPGA IMPLEMENTATION
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Abstract-Security is the most vital element in information communication system, where greater randomization in secret keys increases the safety as well as the complexity of the cryptography algorithms. The algorithms corresponding to DES, Triple DES are

Speed Traffic-Sign Number Recognition on Low Cost FPGA for Robust Sign Distortion and Illumination Conditions
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Abstract-In this paper, we propose a hardware-oriented robust speed traffic-sign recognition algorithm which can process real-time for Advanced Driving Assistant System (ADAS). In difficult conditions, such as sign distortion in various angle or at night and rain, the proposed

FPGA based on-board horizon detection for UAV
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Abstract We introduce the FPGA implementation of a previously developed fast horizon detection algorithm in this paper. The algorithm is suited for visual applications in airborne environment, that is on-board a small-size unmanned aircraft. The algorithm was designed

FPGA IMPLEMENTATION OF GENERALIZED HOUGH TRANSFORM
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Abstract-Hough transform is used for robust detection of line and circles in an Image. Hough Transform provides accurate results in case of noise and faulty input data of an image. This paper gives design of FPGA hardware implementation of Generalized Hough transform. Abstract Image processing plays a major role in the efficient transmission of images. Representation of images mathematically and performing various operations in digital form makes the process more effective in todays communication systems. Performing this image

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