fpga-field programmable gate arrays-research papers-2012
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fpga-field programmable gate arrays-research papers-2012




Performance Analysis of CORDIC Architectures Targeted for FPGA Devices.
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ABSTRACT Digital Signal Processing domain has long been dominated by software systems; however, the state of art signal processing is now again switching back to hardware based solutions. This requires development of algorithms that can be efficiently implemented on

FPGA-based wireless link emulator for wireless sensor network
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Abstract. Wireless sensor testbeds lack the flexibility for topology control and the accuracy for interference generation. Once the testbed is set up, the topology becomes fixed. Due to the nature of the wireless environment, experimenters often suffer from unpredictable

A Novel Design of Low Power, High Speed SAMM and its FPGA Implementation
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ABSTRACT The matrix multiplication is a computationally intensive problem and a prerequisite in various image processing applications like spatial and frequency filtering, edge detection and convolution. Being a core part of various applications in portable

Optimization Of Run-time Mapping On Heterogeneous CPU/FPGA Architectures
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ABSTRACT This research investigates the problem of the optimisation of run-time task mapping on a real-time computing system CPU/FPGA (Central Processing Unit/Field- Programmable Gate Array) used to implement intimately coupled hardware and software

Efficient FPGA-Based Implementations of MIMO-OFDM Physical Layer
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ABSTRACT Recently, Multiple-input Multiple-output and Orthogonal Frequency Division Multiplexing (MIMO-OFDM)-based technologies have been deployed in advanced wireless communication systems. In this paper, we present a prototype Field Programmable Gate

The NIGE Machine: an FPGA based micro-computer system for prototyping experimental scientific hardware
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ABSTRACT This paper describes the NIGE Machine, a user-expandable micro-computer system that runs on an FPGA development board and is designed speci cally for the rapid prototyping of experimental scienti c hardware or other devices. The key components of

Design of a Low Power Processor for a Surveillance System Using an FPGA
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ABSTRACT This paper describes the design and implementation of a power saving processor on an FPGA, which is intended to be embedded in a surveillance system. The processor switches between the pipeline and non-pipeline modes in accordance with the

Methodology of FPGA-based mathematical error-based tuning sliding mode controller
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ABSTRACT Most of nonlinear controllers need real time mobility operation so one of the most important devices which can be used to solve this challenge is Field Programmable Gate Array (FPGA). FPGA can be used to design a controller in a single chip Integrated Circuit (

LabVIEW FPGA based Software Implementation for an Automated Test System of Shafts used in High Lift System of an Aircraft
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ABSTRACT Shafts used in the high lift system (wings of a plane) of an aircraft undergo extreme load conditions during takeoff and landing. Performance of shaft deteriorates along the life span of it. The failure of shaft can lead to a major catastrophe. Therefore, to ensure

238 TEACHING DIGITAL DESIGN IN THE FPGA AGE
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A growing number of digital electronic systems are based on Field Programmable Gate Arrays (FPGA), chips that, after fabrication, can be configured by the designer to implement specific functions and systems. A typical FPGA contains many thousands of simple logic

Computation of Background for Photoemission Electron Microscope Image Using FPGA
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The purpose of our development is to design an FPGA based hardware acceleration system that is able to be used for analyzing photoemission electron microscope (PEEM)[1, 2, 3] images or improving their quality. Even though a usual PEEM has an energy filter unit,

Architecture Design and FPGA Implementation of an FFT based Reactive Power Meter
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ABSTRACT Reactive power measurement is increasingly paid attention by power industry. A novel architecture to measure the reactive power is proposed in this paper. Architecture is described in verilog and implemented using Xilinx ISE 13.1 i. In this method voltage and

Saliency Detection on FPGA Using Accelerators and Evaluation of Algorithmic Skeletons
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ABSTRACT Real-time vision applications are becoming more interesting to use as more computing power is available, but often those applications are still too compute intensive. Therefore, an FPGA can be used to accelerate the application. However, making an FPGA

FPGA Implementation of Reed-Solomon Decoder for IEEE 802.16 WiMAX Systems using Simulink-Sysgen Design Environment
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ABSTRACT This paper presents FPGA implementation of the Reed-Solomon decoder for use in IEEE 802.16 WiMAX systems. The decoder is based on RS (255,239) code, and is additionally shortened and punctured according to the WiMAX specifications. A Simulink

Describing the FPGA-Based Hardware Architecture of Systemic Computation (HAoS)
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Abstract. This paper presents HAoS, the first hardware architecture of the bioinspired computational paradigm known as Systemic Computation (SC). SC was designed to support the modelling of biological processes inherently by defining a massively parallel non-

Implementation of Low Power RC5 Algorithm in XILINX FPGA
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ABSTRACT Nowadays data transmission through a channel requires more security. Security gaining more importance than simply transmission. Secure transmission require cryptographic algorithm. The requirements of hardware implementation of these

Design of High PerformanceLow Power Up Down Counter on FPGA
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ABSTRACT Counters are the basic building block in embedded system design. Counters are used for counting purpose. Similarly it is used for frequency division. Counters are the Sequential Circuits in which the output depends upon the previous as well as present

Design and FPGA implementation of Addressable Chip for Multiple Sensor Applications
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ABSTRACT This electronic document is a live template. The various components of your paper [title, text, heads, etc.] are already defined on the style sheet, as illustrated by the portions given in this document In recent years, automation of industries became

Realtime hdr (high dynamic range) video for eyetap wearable computers, fpga-based seeing aids, and electric eyeglasses
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Abstract Realtime video HDR (High Dynamic Range) is presented in the context of a seeing aid designed originally for task-specific use (eg electric arc welding). It can also be built into regular eyeglasses to help people see better in everyday life. Our prototype

Efficient FPGA implementation of montgomery multiplier using DSP blocks
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In this paper, an efficient Montgomery modular multiplier is designed exploiting the efficiency of inbuilt multiplier and adder soft-cores of DSP blocks. 256× 256 bit multiplier has been implemented with (i) fully parallel,(ii) pipelined and (iii) semi parallel architectures that

PS2-VGA Peripheral based Character Display using FPGA
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ABSTRACT The aim of this paper is to print characters by providing the interfaces to connect a VGA port for graphical output and a PS/2 port for keyboard input. This system is then to be synthesized on an FPGA board, and should be capable of running a program to display

Low-Power Optimization using FPGA Routing Circuits
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ABSTRACT Power optimization is the use of electronic design automation tools to optimize (reduce) the power consumption of a digital design, such as that of an integrated circuit, while preserving the functionality. The increasing speed and complexity of today s designs

Design and evaluation of a delay-based FPGA physically unclonable function
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ABSTRACT A new Physically Unclonable Function (PUF) variant was developed on an FPGA, and its quality evaluated. It is conceptually similar to PUFs developed using standard SRAM cells, except it utilizes general FPGA reconfigurable fabric, which offers several

A review of the present state of art in FPGA-Based Adders
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ABSTRACT Adders are the most fundamental arithmetic circuits that are used in processors and play key role in VLSI circuits. Power consumption and speed of these circuits are important quality factors for high performance integrated processing circuits. Floating-point

FPGA Implementation of Pipelined CORDIC Sine Cosine Digital Wave Generator
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ABSTRACT The coordinate rotation digital computer (CORDIC) algorithm is well known iterative algorithm for performing rotations in digital signal processing applications. Hardware implementation of CORDIC results increase in Critical path delay. Pipelined

Hardware Design of the PSK Modem using FPGA and DSP
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ABSTRACT Convolution turbo code has been adopted as an optional channel coding scheme for wireless data link communication system owing to its powerful error correction capability and flexibility. In this paper, the modem was designed using differential 8PSK modulation

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