on chip network 2
Intelligent On/Off Link Management for On-Chip Networks
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A Savva, T Theocharides… – Proceedings of the
… We adopted the Orion power model for the dynamic power consumption of each router [7], and
designed and synthesized the router and link hardware in Verilog and Synopsys Design Compiler,
in an attempt to obtain the leakage power. … “A network on Chip Architecture and