ENGINEERING RESEARCH PAPERS

VHDL IEEE PAPER 2018




To Design 16 bit Synchronous Microprocessor using VHDL on FPGA
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ABSTRACT -The project aims at designing a 16 bit synchronous microprocessor using vhdl and the implementation of its components in FPGA (Field Programmable Gate Array). The project gives description of design and simulation of the modules like the ALU (Arithmetic and logic

Application-Specific Hardware Architecture Design with VHDL
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Low Power and Simple Implementation of Secure Hashing Algorithm (SHA-2) using VHDL Implemented on FPGA of SHA-224/256 Core
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ABSTRACT Cryptography plays an important role in the security of data. Even though the data is encrypted it can be altered while transmitting on the network so data should be verified using a digital signature. Hashing algorithms are used to create these digital

VHDL Based Symbolic Model Checker with Improved CTL Property Language
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ABSTRACT : Most existing verification tools suffer from having a standard language for design specification. Although most of these tools support standard hardware description languages, but the subset of the HDL they support is very limited. In this paper we introduce

Developing of AMBHA AHB Based Memory Controller using VHDL
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ABSTRACT In this paper, the design and implementation of an AMBA based Memory controller is proposed. The AMBA based Memory controller gives an ease of integration for sub-frame extraction of various data structures in SOC. AMBA based interaction deals with
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