vlsi layout-1
A lower bound for the tree-width of planar graphs with vital linkages
FREE-DOWNLOAD [PDF] I Adler 2010
It is a classic problem in algorithmic graph theory and it has many applications, eg in routing
problems, PCB design and VLSI layout It is NP-hard and it remains NP-hard on planar
graphs [10]. Node-disjoint paths on the mesh and a new trade-off in vlsi layout.