An efficient HW SW integrated verification methodology for 3D Graphics SoC development



FREE-DOWNLOAD TY Ho, LB Chen… – Consumer Electronics, 2009. ISCE’ Abstract—This paper proposes an efficient HW/SW integrated verification methodology for 3D
Graphics (3DG) acceleration on SoC development. The proposed methodology is built for
verify- ing 3DG SoC with FPGA emulation and contains a GUI analyz- ing tool for 




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