Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC
FREE-DOWNLOAD MD Ker, CY Wu, T Cheng… – Very Large Scale …,
Capacitor-couple technique used to lower snapback- trigger voltage and to ensure uniform
ESD current distribution in deep-submicron CMOS on-chip ESD protection circuit is
proposed. The coupling capacitor is realized by a poly layer right under the wire-bonding
Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC IEEE PAPER
Complexity Analysis of Simulink Models to improve the Quality of Outsourcing in an Automotive Company
Design and Implementation of a Parallel Turbo-Decoder ASIC for 3GPP-LTE
FREE IEEE PAPER
how can i get research papers
Hi,
just click on “free download ” after the topic title to free download the research paper
search in the search box in http://www.engpaper.com for more papers
Guru