Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC
FREE-DOWNLOADMD Ker, CY Wu, T Cheng… – Very Large Scale …,
Capacitor-couple technique used to lower snapback- trigger voltage and to ensure uniform
ESD current distribution in deep-submicron CMOS on-chip ESD protection circuit is
proposed. The coupling capacitor is realized by a poly layer right under the wire-bonding
send whatsapp message or email guru1@engpaper.com your question or new paper request
SEND WHATSAPP MESSAGE TO US
https://wa.me/message/IF5WM7KJ4RIPN1
how can i get research papers
Hi,
just click on “free download ” after the topic title to free download the research paper
search in the search box in https://www.engpaper.com for more papers
Guru