A 10b 100MS/s 25.2 mW 0.18µm CMOS ADC with various circuit sharing techniques

FREE-DOWNLOAD [PDF] BS Park, SH Ji, MH Choi, KH Lee… – SoC Design …, 2009
Abstract—This work describes a 10b 100MS/s 0.18µm CMOS three-stage pipeline ADC. Two
MDACs share an op-amp without MOS switches connected in series while removing a memory
effect. Three flash ADCs use only one resistor ladder while the second and third flash