FPGAs Implementation of a digital IQ demodulator using VHDL
AI >GPAY >CLOUD >SECURITY
FPGAs Implementation of a digital IQ demodulator using VHDL-download
C Jong, Y Lam… – Field-Programmable Logic and Applications, 1997 – Springer
Abstract. This paper presents the implementation of a digital IQ demodulator in FPGA
devices. A DSP-based algorithm representing the demodulator was described in behavioural
VHDL, which was used for simulation at the functional level. During the simulation, not
COMMENT vlsi
Assessing the potential of multi-threaded VHDL simulation
VHDL modelling of a fuzzy co-processor architecture
FREE IEEE PAPER