Low power input output port design using clock gating technique



FREE-DOWNLOAD H Yang, CA Bulucea, N Kalamani… – … and Computers in …, 2010 – wseas.us
is regarded as one of the effective logic in RTL and architectural power reduction [2]. Clock  Roy,
K. Vijaykumar, TN DCG: deterministic clock-gating for low-power microprocessor design; research
Transactions on Very Large Scale Integration(VLSI) Systems






 

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