simulation of VLSI networks



A model for the high-level description and simulation of VLSI networks

FREE-DOWNLOADAJ Van Der Hoeven, AAJ De Lange… – Micro, …
It allows the description of designs from the level of abstract functional or algorithmic behavior
down to the register-transfer level. The model can describe both synchronous and asynchronous
designs. In design descriptions, the model logically separates state, function, and function



IEEE PROJECTS
COMMENT analog, free research papers, vlsi



 

FREE IEEE PAPER