Yield enhancement of programmable ASIC arrays by reconfiguration of circuit placements

FREE-DOWNLOADJ Narasimham, K Nakajima, CS Rim… – … -Aided Design of …,
Abstract- In an approach recently proposed for the yield enhancement of programmable gate
arrays (PGA’s), an initial placement of a circuit is first obtained using a standard technique such
as simulated annealing on a defect-free PGA. In the next step, this placement is .

IEEE PROJECTS 2019

IEEE PROJECTS