Dielectrophoretic Integration of Nanodevices With CMOS VLSI Circuitry

We present a novel platform for the development and deployment of nanosensors in integrated systems. The nanosensor technology is based on cylindrical structures grown using porous membranes as templates. These nanostructures are manipulated using dielectrophoretic forces, thus allowing their individual assembly and characterization. This assembly also enables the development of “mixed-mode” integrated circuits that include readout, signal processing, and communications circuitry, as well as the requisite layout for the post-integrated-circuit assembly of the nanostructures. We report the results of assembly experiments performed on complementary metal–oxide–semiconductor (CMOS) circuitry designed using Freescale semiconductor’s HiP6W low-voltage 0.18- m Si/SiGe BiCMOS process.

RESEARCH AND development activities in the area of integrated sensor systems have grown over the last several years. These efforts aim to combine on-chip physical, chemical, and/or biological sensing units with analog readout electronics and appropriate data communication circuitry [1]. Potential applications of such integrated sensors include various military, environmental, and industrial systems. For example, integrated sensor systems can be used in security and surveillance for homeland defense or in real-time environmental monitoring for chemical/biological attacks. Meanwhile, nanotechnology offers potential cost-effective solutions for the development of highly sensitive and multifunctional sensor devices . Nanoscale control of materials allows the realization of devices, such as nanowires and nanotubes, with tailored chemical, physical, and/or electronic properties. Various techniques have been developed for the synthesis of functional nanowires such as DNA-templated nanowire growth , chemical or electrochemical growth , , and nanotemplated electroplating. These synthesis techniques offer new approaches for the development of highly sensitive functional nanodevices. In addition, the inherently small dimensions of such structures potentially allow the integration of a large number of low-power consuming devices into diverse-functionalized sensor arrays. However, the realization of single-chip systems leveraging such nanosensor technologies requires the development of a CMOS-compatible platform for their assembly and integration

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