digital signal processing research papers 2012 section 4

digital signal processing research papers 2012 section 4







Processor Design with DSP Enhancements for Wireless Applications
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ABSTRACT In wireless digital communication domain severe degradation in transmission channel gives rise to interference, attenuation, fading due to multipath. Orthogonal frequency division multiplexing (OFDM) overcomes these limitations by modulating the

HW/SW Codesign for DSP
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The course Hardware/Software-Codesign for digital signal processors is mainly based on the book:[1](german version)/[2](english version). Other recommended books can be found at the references at the end of this script:[3][4][5][6]. More specific scientific publications will

Development of Small-size and Low-priced Speaker Detection Device Using Micro-controller with DSP Functions
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ABSTRACT This paper report that the implementation of the speaker direction detector using a small and low-priced micro controller called dsPIC and propose the speaker localization method integrating the results from the multiple detectors. To confirm a basic performance

A New Approach to Design of an Address Generation Unit in a DSP Processor
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ABSTRACT This paper presents the behavioral model of an Address Generation Unit (AGU) in a DSP Processor whose instructions are almost compatible with the Motorola DSP56002. The proposed AGU unit can handle 4 different types of arithmetic – linear addressing, modulo

DSP Lab Manual
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The hardware experiments in the DSP lab are carried out on the Texas Instruments TMS320C6713 DSP Starter Kit (DSK), based on the TMS320C6713 floating point DSP running at 225 MHz. The basic clock cycle instruction time is 1/(225 MHz)= 4. 44

Design and development of standalone DSP prototype for QT interval processing and monitoring
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This paper describes the development of stand alone DSP hardware for QT interval monitoring and assessment. The QT interval has been known to be an important indicator prior to Myocardial Infarction (MI) and it is important to observe and monitor any changes

High Speed/Bandwidth Instrument Development (How to make efficient use of Virtex 5 DSP)
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3 GHz bandwidth Process 16 8-bit samples/cycle ? 375 MHz clock rate on Virtex-5 FPGA (SX95T–640 DSP48Es) ? 2048 point transform ? THE PUNCHLINE (ie why you might care even if you re not an engineer) ? 1k channel version meets bandwidth target without

Real-Time DSP-Based License Plate Character Segmentation Algorithm using 2D Haar Wavelet Transform
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The potential applications of Wavelet Transform (WT) are limitless including image processing, audio compression and communication systems. In image processing, WT is used in applications such as image compression, denoising, speckle removal, feature

DSP-Based Control of Boost PFC AC-DC Converters Using Predictive Control
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ABSTRACT For digital power-factor correction (PFC) control methods, the duty cycle is calculated in every switching period. One main implementation barrier is the limited switching frequency, due to the limited processor speed. In this paper a predictive digital

Implementation of DSP Based Cost Effective Inverter Fed Induction Motor Drive with VisSim
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The implementation of a Digital Signal Processor (DSP) based high-performance cost effective fed Induction Motor drive with VisSim/Embedded Controls Developer (ECD) is presented in this paper. In the experimental work VisSim/ECD software automatically

Comparative Analysis of Polynomial FIR Multirate DSP Applications
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ABSTRACT Multirate DSP systems in which different parts at different sampling rates. The icrease in the sampling interval results in more time availble for processing. Decimation generally icludes first low-pass filtering the signal and then discarding some of the

State of the art baseband DSP platforms for Software Defined Radio: A survey
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ABSTRACT Software Defined Radio (SDR) is an innovative approach which is becoming a more and more promising technology for future mobile handsets. Several proposals in the field of embedded systems have been introduced by different universities and industries to

Real Time Implementation of Adaptive Beam former for Phased Array Radar over DSP Kit
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ABSTRACT Mechanical positioners, rotating antennas and large size of early generation radars limited the capability of the radar system to track laterally accelerating targets. Electronic Scanning Array (ESA) such as used in Phased Array Radar (PAR) overcomed these

Design of High Performance Multiplier Unit using SDTBNS for DSP Applications
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ABSTRACT In this paper, a new number system Single Digit Triple Base Number System (SDTBNS) using 2, 3 and 5 as the bases have been introduced. Advantages of SDTBNS over Single Digit Double Base Number System (SDDBNS) have been discussed here.

Active power measurements-An overview and a comparison of dsp algorithms by noncoherent sampling
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This paper presents an overview of algorithms for one-phase active power estimation using digital signal processing in the time domain and in the frequency domain, and compares the properties of these algorithms for a sinusoidal test signal. The comparison involves not

A practical approach to speech processor for auditory prosthesis using DSP and FPGA
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ABSTRACT Auditory prosthesis (AP) is a widely used electronic device for patients suffering with severe hearing loss by electrically stimulating the auditory nerve using an electrode array surgically placed inside the inner ear. The AP also known as cochlear implant (CI)

Assembly Optimization of AVS Sub-pixel Interpolation Module Based on C64x+ DSP
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ABSTRACT Since the procedures of sub-pixel interpolation are frequently called for AVS, the optimization of the module will improve the speed of whole encoding process. The Very Long Instruction Word (VLIW) and compact instruction architecture is widely used for DSP.

Efficient 2D to 3D video conversion implemented on DSP
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ABSTRACT An efficient algorithm to generate three-dimensional (3D) video sequences is presented in this work. The algorithm is based on a disparity map computation and an anaglyph synthesis. The disparity map was first estimated by employing the wavelet

Implementation of Signal Generator (DSP) Using TMS 320 C 6713 DSK
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ABSTRACT TMS 320 C 6713 DSK is used for the implementation of signal generator (DSP). The DSP processor TMS320C6713DSK with Code Composer Studio has been used to generate the signal waveforms and is used for interfacing user and the DSP board. A look-

Computer Aided Design for Low Power Fir Processor on System On-Chip Platform Architecture for High Performance DSP Applications
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ABSTRACT The continually increasing integration density of integrated circuit, with astronomical increase in fabrication cost and enormous time to market portrays important paradigm shift in next generation System–on-Chip (SoC) design. This leads more programmable designs

IMPLEMENTATION OF VITERBI ALGORITHM ON DSP
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ABSTRACT All real systems that work with digitally represented data require error correcting codes because all real channels are noisy to some extent. The basic goal is to control errors in data transmission over unreliable or noisy communication channels. Coding techniques

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