direct conversion receiver for 3G WCDMA

A 2-GHz direct conversion receiver for wideband code division multiple access (WCDMA) is presented. It integrates two low noise amplifiers (LNAs), a quadrature mixer, quadrature LO generation divider, baseband 5th-order channelselect filters with programmable gain, and cutoff frequency auto calibration scheme. The chip was fabricated in TSMC 0.35μm SiGe process with 2.7V power supply. The noise figure is 2.5dB at the 102dB maximum voltage gain, and the iIP3 and iIP2 are –19dBm and +25dBm, respectively. This receiver achieves 100dB programmable gain in 1dB steps.