ERROR DETECTION AND CORRECTION
The small size of the transistors or capacitors, combined with cosmic ray effects, causes occasional errors in stored information in large, dense RAM chips, particularly those that are dynamic. These errors can be detected and corrected by employing error-detecting and -correcting codes in RAMs. The most common error detection scheme is the parity bit. (See Section 2-7.) A parity bit is generated and stored along with the data word in memory. The parity of the word is checked after reading the word from memory. The word is accepted if the parity of the bits read out is correct. If the parity of the bits read is incorrect, an error is detected, but it cannot be corrected.
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