FPGA-field-programmable gate array IEEE PAPERS AND PROJECTS-2020



A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing – hence the term “field-programmable”



Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency.
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Designs generated by high-level synthesis (HLS) tools typically achieve a lower frequency compared to manual RTL designs. In this work, we study the timing issues in a diverse set of realistic and complex FPGA HLS designs.(1) We observe that in almost all cases the

Power wasting circuits for cloud FPGA attacks
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Recent research has exposed a number of security issues related to the use of FPGAs in cloud computing environments. Circuits that deliberately waste power can be carefully crafted by a malicious cloud FPGA user and deployed to cause denial-of-service and fault This paper presents a novel fourth-order autonomous flux controlled memristive Wien-bridge system. Standard nonlinear diagnostic tools such as bifurcation diagram, graphs of largest Lyapu exponent, Lyapu stability diagram, phase space trajectory and isospike This paper presents a novel simple 4-D dissipative autonomous hyperchaotic system with a saddle-point index-2 equilibrium point. The dynamics of the new system consists of nine terms with two nonlinear terms. Thus, the proposed system is one of the simplest 4-D The efficiency of the hardware implementations of fractional-order systems heavily relies on the efficiency of realizing the fractional-order derivative operator. In this work, a generic hardware implementation of the fractional-order derivative based on the GrünwaldThe effort in reducing the area of AES implementations has largely been focused on application-specific integrated circuits (ASICs) in which a tower field construction leads to a small design of the AES S-box. In contrast, a naive implementation of the AES S-box has

HeteroRefactor: refactoring for heterogeneous computing with FPGA
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Heterogeneous computing with field-programmable gate-arrays (FPGAs) has demonstrated orders of magnitude improvement in computing efficiency for many applications. However, the use of such platforms so far is limited to a small subset of programmers with specialized

A prefetch-aware scheduling for FPGAbased multi-task graph systems
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In partially run-time reconfigurable (PRR) FPGAs, hardware tasks should be configured before their execution. The configuration delay imposed by the reconfiguration process increases the total execution time of the hardware tasks and task graphs. In this paper, a Digital images are affected by various types of noises, which be incorporated into the image during its acquisition, transmission etc. Removal of these unwanted noises is an essential task, especially for digital images being used for various science, engineering, and

Tandem Deep Learning Side-Channel Attack Against FPGA Implementation of AES.
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The majority of recently demonstrated deeplearning side-channel attacks use a single neural network classifier to recover the key. The potential benefits of combining multiple classifiers have not been explored yet in the side-channel attacks context. In this paper, we Abstract True Random Number Generator (TRNG) has become a central element of todays secure communication. TRNGs developed through FPGA implementation have a significant role in a number of applications in multimedia communication. Ring Oscillator (RO) has

A reconfigurable model-based design for rapid prototyping on FPGA
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The digital design methodologies are evolving with the increase of digital systems utilization in daily life. The Model Based Design (MBD) methodology provides a unique methodology for design and implementation of digital systems on Field Programmable Gate Array ( FPGA )

DES encryption and decryption algorithm implementation based on FPGA
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Nowadays there is a lot of importance given to data security on the internet. The DES is one of the most preferred block cipher encryption/decryption procedures used at present. This paper presents a high throughput reconfigurable hardware implementation of DES

Efficient and Fast Hardware Architectures for SIKE Round 2 on FPGA
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New primes were proposed for Supersingular Isogeny Key Encapsulation (SIKE) in NIST standardization process of Round 2 after further cryptanalysis research showed that the security levels of the initial primes chosen were over-estimated [ 3]. In this paper, we

FPGA HW Accelerator of the First Step of Systematic Two-Level Minimization of Single-Output Boolean Function
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Boolean function minimization is an area important not only in the development and optimization of digital logic, but also in other research and development areas, such as, the optimization of control systems, simplifying program logic, artificial intelligence, etc. The aim

HACK COMPUTER: FPGA IMPLEMENTATION AND SYSTEM PROGRAMMING SUPPORT
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The Hack computer is custom-made computer system which is primarily built as a teaching architecture. Its design and functions are relatively simple, but still emphasize all the complexity of modern hardware and software approaches in computer design. In this paper

Is FPGA Useful for Hash Joins
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Benefiting from the fine-grained parallelism and energy efficiency, heterogeneous computing platforms featuring FP-GAs are becoming more and more common in data centers. The hash join is one of the most costly operators in database systems and

FPGA Based Digital Implementation of Adaptive Synchronization Methodology for 6-D Chaotic System
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In this paper, we proposed the FPGA based digital implementation of synchronization methodology for 6-D chaotic systems via nonlinear feedback adaptive control technique. We derived new results for the adaptive controllers and the parameter update laws based on

Design and Implementation of Reconfigurable Neuro-Inspired Computing Model on a FPGA
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In this paper we design a large scale reconfigurable digital bio-inspired computing model. We consider the reconfigurable and event driven parameters in the developed fieldprogrammable neuromorphic computing system. The various Intellectual Property (IP)

Using Machine Learning to Estimate Utilization and Throughput for OpenCL-Based SpMV Implementation on an FPGA
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Hardware designers use High-Level Synthesis (HLS) tools in order to reduce the design time and design complexity. OpenCL is a framework that uses HLS tools and permits the programmer to write standardized C-like code for the host as well as for the hardware

Evaluation of the SEU Faults Coverage of a Simple Fault Model for Application-Oriented FPGA Testing
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Testing of FPGAbased designs persists to be a challenging task because of the complex FPGA architecture with heterogeneous components, and therefore a complicated fault model. The standard stuck-at fault model has been found insufficient. On the other hand

Design and implementation a prototype system for fusion image by using SWT-PCA algorithm with FPGA technique.
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The technology of fusion image is dominance strongly over domain research for recent years, the techniques of fusion have various applications in real time used and proposed such as purpose of military and remote sensing etc., the fusion image is very efficient in

Multi- FPGA Co-optimization: Hybrid Routing and Competitive-based Time Division Multiplexing Assignment
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In multi- FPGA systems, time-division multiplexing (TDM) is a widely used technique to transfer signals between FPGAs. While TDM can greatly increase logic utilization, the inter- FPGA delay will also become longer. A good time-multiplexing scheme for inter- FPGA

DESIGING AND IMPLEMENTING OF UART AND ALU ON FPGA
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ALUs are the basic building blocks of any microprocessors and microcontrollers. It defines the implementation of various combinational and logical functions. This paper describes the designing of the UART AND ALU, their communication and implementation on the FPGA

Turning the Table: Using Reverse Engineering Techniques to Detect FPGA Trojans
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ABSTRACT According to recent reports - , FPGAs have increasingly become the prime targets for carrying out extremely sophisticated cyber-attacks. Reconfigurability, a core feature of FPGAs, which allow modular designs to be mapped, consequently makes themThe dynamical characteristics and its applications to random number generator of a fractal Josephson junction with unharmonic current-phase relation (FJJUCPR) described by a linear resistive-capacitive-inductance shunted junction (LRCLSJ) model are investigated in

MODULAR FPGA SYSTEMS WITH SUPPORT FOR DYNAMIC WORKLOADS AND VIRTUALISATION
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5.1 Spectorbenchmarksuiteimplementationandi. 100 5.2 Available resources for FOS ZCU102 and Ultra-96 platforms 102 5.3 Resource overhead of bus virtualisation at logical and physical levels. 103 5.4 Compilation latencies of FOS vs Vivado 104 5.5 ExecutionoverheadcausedbyvarioussoftwarClustering algorithms are used to classify the unlabeled data into a number of categories with polynomial time complexity. Quantum clustering algorithms are developed to improve the performance and to achieve higher gain. In this work, we implement the quantum k

FPGA for HPC-exploring the possibilities of an alternative computer architecture A Snowmass Letter of Interest for the Computational Frontier
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High Performance Computing (HPC) is nowadays a crucial resource for advancing science. It is required at all levels of discovery: starting at the design of new experiments, through simulations of their performance, triggering system to select events to be analyzed, to the

Dynamic scheduling of task graphs in multi- FPGA systems using critical path
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SRAM-based FPGAs feature high performance and flexibility. Thus, they have found many applications in modern high-performance computing (HPC) systems. These systems suffer from the limitation of the computing resources problem for running HPC applications

FPGA IMPLEMENTATION OF SECOND ORDER SLIDING MODE BASED ON ST ALGORITHM FOR TYPE 1 DIABETES
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Diabetes is an increasing worldwide health problem. In particular, patients with type 1 diabetes who require strict control of blood glucose because they have insulin production insufficient. In this paper, the Second Order Sliding Mode Controller (SOSMC) depending on

DEVELOPMENT OF AN EMBEDDED CONTROLLER FOR SMALL SCALE DC MOTORS USING FPGA
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In this paper, a comprehensive method for the development of an embedded PID controller for the speed control of small scale dc motors using a low cost FPGA (Field Programmable Gate Array) is presented. The PID controller in FPGA is represented in terms of VHDL code

A FPGA Serial Port Transmission Fault Analysis and Design Optimization
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One of the functions of FPGA in a satellite equipment is to receive data framing instructions from main control system, solve the data of the sensor at this time, and send the data through the serial port according to the format of response frame. In the system joint debugging, a Image/video processing in real-time is always in high demand for the quality of video. There are several factors which cause the loss of the video content, such as the type of transmission, missing data and especially data switch. Data switch generally occurs in the Abstract In recent years, Field Programmable Gate Array ( FPGA ) has different, and novel combinations of soft and hard cores embedded with accelerators in the same chip. At present, Heterogeneous Multiprocessor System-on-Chip technology meets the needs of the

Implementation of an FPGAbased System for Temperature, Flow, and Hydraulic Pressure Measurement of Fluids
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In this study, an FPGAbased monitoring system that can analyze the characteristics of an automobile cooling system and various fluid systems was implemented. The system can simultaneously measure changes in the temperature, flow rate, and pressure of a fluid

An EDSP Estimation And Recalibration In FPGA Using Systematic Sampling
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In electronic applications, a synchronous relationship between the signals needs to be preserved for that phase measurement is required. In a Traditional electronic systems, the time measurement system is designed by using classical mixed signal approach. But it Reversible calculations have lot of applications in various fields like in Nanotechnology, Low power CMOS, Optical computing, Digital Image Processing, etc. Reversible calculations are the best systematic ways to turn down heat dissipation than any other standard methods Many modern applications, such as industrial control, image processing and machine learning, are based on optimization algorithms that must solve compute-intensive problems under real-time constraints taking into account real-world parameters that evolve in time

FPGA architecture to search for accelerated pulsars with SKA
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This paper presents a design which uses an FPGA (Field Programmable Gate Array) to search for radio pulsars in binary systems for the Square Kilometre Array (SKA). The search pipeline executes Doppler de-acceleration algorithm in real-time to identify binary pulsar

FPGA Based Hardware Implementation Of Cryptographic Process Using Sea
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The implementation of encryption/decryption algorithm it is provide the more secure communication for the data transform. The triple AES algorithm using encrypts the data for secure communication. The triple AES gives the security of da ta, image, picture and etc. In

ON IMPLEMENTATION OF FFT PROCESSOR IN XILINX FPGA USING HIGH-LEVEL SYNTHESIS
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The paper presents results of the high level synthesis of an 1024-point radix-2 FFT processors in Xilinx Vivado FPGA environment. The use of various directives controlling the synthesis process is examined. The results indicate that using the proper set of directives the

Accurate Operation Delay Prediction for FPGA HLS Using Graph Neural Networks
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Modern heterogeneous FPGA architectures incorporate a variety of hardened blocks for boosting the performance of arithmeticintensive designs, such as DSP blocks and carry blocks. Since hardened blocks can be configured in different ways, a variety of datapathIsolated DC DC converters are preferred in the design of power supplies, for better safety and isolation purpose. Challenging task in the design of controllers for the converters is, compensating the effects of nonlinearity of switching and other components. This paperThe objective of this paper is to study the literature for FPGA based digital sown conversion technique for radars. The review of literature describes work done in the field of Radar technology. Elaborates the step by step improvements in the field of waveform generation

Real-Time FPGAbased HIL Emulator of Power Electronics Controllers using NI PXI for DFIG Studies
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 Abstract This paper presents a high-performance hardware-in-the-loop (HIL) system aimed to assist experts in developing and testing power electronics control board and their logic with Real-Time (RT) models of both electrical and mechanical components. For

Detection of Breast Cancer in Infrared Thermographies Using Stochastic Techniques in a FPGA Platform
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Thermo graphical infrared images to predict the existence of a thermal anomaly according to symmetry in breasts by using stochastic methods and fuzzy logic control is proposed. Statistical results are established through entropy, kurtosis and media to evaluate symmetrySupport vector machine (SVM) is a robust machine learning model with high classification accuracy. SVM is widely utilized for online classification in various real-time embedded applications. However, implementing SVM classification algorithm for an embedded system

FPGAbased digital image processing algorithms implementation overview
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Devices, that FPGAs use, are very popular today. These devices contain FPGA as a part of system-on-a-chip (SoC) or as an independent integrated circuit. FPGA (field- programmable gate array) is a digital integrated circuit consisting of programmable logic An efficient integration of Internet of Things (IoT) and cloud computing techniques accelerates the evolution of next-generation smart environments (eg, smart homes, buildings, cities). The advanced modern cloud networking architecture also helps to

Empirical Performance Comparisons of GPU, CPU, FPGA and MAESTRO
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Signal and image processing is of con-siderable importance in many fields such as electronic communications, medical instruments, and tele-medicine especially when used in (near) real time environments. Efficiency (speed of processing and/or performance per Watt)

A Phase Measurement System Using FPGA
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Phase measurement is required in electronic applications where a synchronous relationship between the signals needs to be preserved. Traditional electronic systems used for time measurement are designed using a classical mixed-signal approach. With the advent of

An RSA Co-processor Architecture Suitable for a User-Parameterized FPGA Implementation
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This paper describes an original and straightforward architecture for a logic circuit implementation of the RSA algorithms. The architecture is ideal for teaching advanced undergraduate or graduate students topics associated with public-key cryptography and

FPGA BASED RIPPLE FREE ON TIME NON LINEAR DIGITAL PSM CONTROLLER FOR A SMPS
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This paper shows how to improve the efficiency of the digital pulse skipping modulation (DPSM) controller. The controller controls MOSFET switch of Switched mode power supply circuit (SMPS) with high switching frequency ranges from 50 kHz to 1MHz. The improved

IMPROVING THE PERFORMANCE OF FPGA USING BIST CONTROLLER
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Today field programmable Gate Arrays ( FPGA ) are extensively used in majority applications. These FPGAs are prone to various Types of faults to other complex integrated circuits chips. Faults occur due to lot of reasons like environmental conditions or aging of the device

Clock and Bitstream Considerations for FPGA
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Field Programmable Gate Arrays (FPGAs) are general-purpose, semiconductor devices commonly used as a general purpose multi-I/O solution for implementing logical circuits. While the primary focus of FPGA design is often on the configurable logic blocks (CLBs)Our time is characterized by the very rapid development of computer science. Computers and embedded systems can be found in practically all fields of human activity. The up-to-day state-of-the-art in this area is characterized by three major factors. The first factor is a

Security analysis of hybrid Intel CPU/ FPGA platforms using IOMMUs against I/O attacks
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This master thesis reviews the security of state-of-the-art hybrid platforms consisting of Intel Xeon CPUs and Field Programmable Gate Arrays (FPGAs). These are now increasingly found with cloud providers in Infrastracture-as-a-Sevice models. Some Hardware

Design of Fault tolerant and high speed TCAMS in FPGA
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Memories are in general protected with error correction codes per word in order to improve its reliability. The FPGA has been involved in many safety and missioncritical applications in the last few decades. FPGA designs are also critical to errors and failures due to radiationsThe present era has witnessed deployment of reconfigurable hardware or field- programmable gate arrays (FPGAs) in diverse domains like automation and avionics, which are cyber physical in nature. Such cyber physical systems are associated with strict power