JPEG Co-Processor

An Ultra-Low-Energy Multi-Standard JPEG Co-Processor in 65 nm CMOS With Sub/Near Threshold Supply Voltage

FREE-DOWNLOAD [PDF] Y Pu, J Pineda de Gyvez… – Solid-State Circuits, …, 2010
In contrast to analog circuit design where lowering the to the subthreshold region is generally
avoided  The testchip was fabricated using TSMC’s 65 nm seven-layer low-power standard CMOS
process.  On the board a Xilinx Spartan-3 FPGA chip functions as the main CPU and