Need for ESD protection



Electrostatic Discharge (ESD), which is a major subset of Electrical Overstress (EOS),
is a major reliability issue in ICs. EOS and ESD together account for more than 60 %
of failures in Si ICs . As semiconductor devices have scaled to smaller dimensions
and ICs have become more complex, the potential for destructive ESD events has
became more serious. The problem of ESD protection is dealt with on a number of
levels such as incorporating on-chip protection circuits, properly grounding the chip
handling equipments and properly training personnel involved with wafer and package
handling, in order to minimize the potential for ESD-related failure. However, once
an IC is packaged and shipped, on-chip protection mechanisms are the major means
of protection against ESD damage .

More recently, there has been a tremendous demand for increasing the electrostatic
discharge (ESD) robustness of Radio Frequency Integrated Circuits (RFICs) in wireless
communications applications, since such products, typically handheld, are much
more prone to ESD-induced damages. On the other hand, ESD protection structures
introduce parasitic effects that can adversely affect the performance of the core circuitry.
Providing sufficient ESD protection for the RFICs in wireless systems without
excessively degrading the performance poses a major design and reliability challenge.
ESD protection for digital ICs is relatively mature; however, ESD protection of RF
circuits is still in its infancy and is a topic of significant research and development till date,


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