on chip network 2

Intelligent On/Off Link Management for On-Chip Networks
A Savva, T Theocharides… – Proceedings of the
… We adopted the Orion power model for the dynamic power consumption of each router [7], and
designed and synthesized the router and link hardware in Verilog and Synopsys Design Compiler,
in an attempt to obtain the leakage power. … “A network on Chip Architecture and