pre-layout extraction




A high level language for pre-layout extraction in parasite-aware analog circuit synthesis

FREE-DOWNLOAD [PDF] RF Badaoui, H Sampath, A Agarwal… – Proceedings of the 14th
ABSTRACT This paper presents a high-level language MSL, for the specifica- tion of
parameterized, topology-specific circuit extractors. Upon compilation, the MSL program yields
an executable module which generates the extracted circuit containing parasitics, passive






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