sample clock dither

Low-complexity all-digital sample clock dither for OFDM timing recovery

FREE-DOWNLOAD [PDF] YH Lin… – Very Large Scale Integration (VLSI) Systems, …, 2010
an example of an in-house 90-nm 1P9M CMOS technology, VIA_1 is 31.8 and VIA_2 is 28.6 ,
which  Two XilinxDSP Develop- ment Kits with on-board 14-bit A/Ds, 14-bit digital-to-analog
(D/A) converters and 2-million-gate field programmable gate array (FPGA, Xilinx Virtex-II