techniques to reduce the different capacitive loads


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• Reduce the area of the parallel plates.
What does this mean in a layout sense? Either shortening the length of
the signal or minimizing the width, or both.

• Reduce the distance d or dielectric distance between the parallel plates.
Again, what does this mean in a layout sense? Whenever possible,
route critical signal lines in empty channels and minimize the amount of area
that the signal is routed over or under other layers.

• Increase the spacing between signals on the same layer to address the coupling
capacitance between them.

• In the case of differential signals, implement a “twisting” scheme that
reduces the coupling effects of the adjacent lines by ensuring that any coupling
affects both signals of the pair equally.




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