VLSI Circuits using Genetic Algorithm


Generating Test Patterns for Multiple Fault Detection in VLSI Circuits using Genetic Algorithm
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R Balasubramanian, K Goutham, S Jenitha

Abstract-In this paper we propose a method for the automatic test pattern generation for
detecting multiple stuck-at-faults in combinational VLSI circuits using genetic algorithm (GA).
Derivation of minimal test sets helps to reduce the post-production cost of testing 







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