vlsi design specification
The bottom-up design flow for a transistor-level circuit layout always starts with a set of design specifications. The “specs” typically describe the expected functionality (Boolean operations) of the designed block, as well as the maximum allowable delay times, the silicon area and other properties such as power dissipation. Usually, the design specifications allow considerable freedom to the circuit designer on issues concerning the choice of a specific circuit topology, individual placement of the devices, the locations of input and output pins, and the overall aspect ratio (width-to-height ratio) of the final design. Note that the limitations spelled out in the initial design specs typically require certain design trade-offs, such as increasing the dimensions of the transistors in order to reduce the delay times.
In a large-scale design, the initial design specifications may also evolve during the design process to accomodate other specs or limitations.
This implies that the designer(s) of individual blocks or modules must communicate clearly and frequently about the spec updates, in order to avoid later inconsistencies.
As an example, the initial design specs of a one-bit binary full adder circuit are listed below:
Technology: 0.8 um twin-well CMOS
Propagation delay of “sum” and “carry_out” signals < 1.2 ns (worst case) Transition times of "sum" and "carry_out" signals <1.2 ns (worst case) Circuit area < 1500 um^2 Dynamic power dissipation (at VDD=5 V and fmax=20 MHz) < 1 mW It can be seen that one can design a number of different adders (with different topologies, different maximum delays, different total silicon areas, etc.), all of which essentially conform to the specs listed above. This indicates that the starting point of a typical bottom-up design process usually leaves the designer a considerable amount of design freedom.
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