Comparative analysis of two operational amplifier topologies for ADC
This paper describes a comparative analysis between two topologies of operational amplifiers to design a 40 MS/s 12-Bit pipeline analog to digital converter (ADC). The analysis includes AC and transient simulation to select the proper topology. This ADC is implemented in a 0.35µm AMS CMOS technology with 3.3V single power supply. The capacitors and selected […]
Designing Opamps for Low Voltage, High Speed, High Accuracy Analog to Digital Converters
This paper presents two opamp design examples for modern analog-to-digital converters. The first opamp, designed for a low-voltage low-power high-speed pipeline ADC, is a two-stage with folded-cascode as the first stage and feature common-mode stabilized active load and closed-loop pole placement techniques. The second opamp, designed for a high-accuracy high-speed sigma-delta ADC, is a two-stage […]
implementation of low voltage high slew rate opamps and linear transconductors
A new class AB differential stage that operates with a single supply voltage of less than two transistor threshold voltages is introduced. This circuit has utilization in high slew rate one stage op-amps, two stage op-amps with class AB input and output stages and linear transconductors. The circuit was verified with simulations and experimentally. It […]