convergence with cadence
For cadence and vco simulations, It is little bit difficult for getting convergence in the simulation, here is some guidlines for getting convergence faster
• Kick-Start: An independent voltage or current source should be inserted to
“kick-start” the oscillating circuit. For simulations in this thesis, a piecewise
current source was used to provide a single 2 ns current pulse. It is preferred
to use an initial condition for one of the passive components in the resonator;
however, the passive components in the CDR1 design kit did not have this
capability. In practice, an oscillator is naturally kick-started by the natural
noise in the residual charges absorbed during circuit power-up.
• Transient Simulation: The total simulation time was typically set to about
100 ns, which provided over 300 waveform periods. It is important to run the
simulation for a fairly long time since there are some cases where a steady oscillation
will appear to start up but then will slowly dampen out. This behavior
indicates that the tank circuit has too much loss, which means the negative
resistance circuit must be revised. It is recommended that all transient simulations
should have the errpreset set to “conservative,” and the integration method
parameter set to “gear2only” to achieve convergence in oscillator simulations
• PSS Settings: After confirming that a particular design has achieved a steady
state oscillation with a transient simulation, large-signal PSS simulations are
then conducted. In PSS, the tstab should be set to an appropriate length of time
to give the oscillator circuit time to settle. Increasing this setting to the same
run-time used in the transient simulations is recommended for achieving PSS
convergence. Also, the reltol should be to 1e-5; this is the relative convergence
tolerance option that specifies how fine the discrete stepping must be relative
to the node voltage. Finally, the vabstol should be set to 3e-8, and the iabstol
should be set to 1e-13.
• PNOISE Settings: Maximum sidebands should be set to 10; this sets up the
analysis to include harmonics of the fundamental, which are generated from nonlinearities
of the oscillator and are included in the total phase-noise calculation.
In addition, reference-sidebands should be set to 0, since the oscillators being
simulated are autonomous circuits and do not require any large-signal input
stimuli.
• N-port Inductor Models: The s-parameters for the inductors obtained from
full-wave EM simulations were included as n-port cells for SpectreRF circuit
simulations. For PSS simulations: Interpolation Method should be set to rational;
Relative error and Absolute error should be set to 0.001; Multiplier and
Scale factor should be set to 1; and Rational order should be set to 5. Cadence
recommends setting the interpolation method to Spline for TRAN, DC, and SP
analysis.
CSE PROJECTS