digital signal processing-dsp-400
Using Linux to Control DSP Processes in Mixed-processor Systems
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G McNutt, T Fischer ,Embedded Edge, 2001 ,focus-webapps.ti.com
Developing a single-processor platform is bad enough. Adding another to the mix could
drive even the best developers over the edge, espe-cially when the mix involves a general-
purpose processor (GPP) and a DSP. Take heart. A new way of thinking and working
Efficient physics based sound synthesis of the piano using DSP methods
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B Bank, L Sujbert ,Proc. European Signal , 2000 ,mit.bme.hu
ABSTRACT In the recent years, digital waveguide modeling of musical instruments has
proven to be an effective tool for sound synthesis purposes, but some practical questions still
have remained unanswered. In this paper a new equivalent structure of the digital
Voltage assignment with guaranteed probability satisfying timing constraint for real-time multiproceesorDSP
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M Qiu, Z Jia, C Xue, Z Shao ,The Journal of VLSI Signal , 2007 ,Springer
Abstract Dynamic Voltage Scaling (DVS) is one of the techniques used to obtain energy-
saving in real-time DSP systems. In many DSP systems, some tasks contain conditional
instructions that have different execution times for different inputs. Due to the uncertainties
Labour market conditions, applications and grants of Disability Support Pension (DSP) in Australia
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L Cai ,Australian Journal of Labour , 2004 ,cbsntweb.curtin.edu.au
Abstract Detiorating labour market conditions worsen the financial situation of the disabled,
reduce the opportunity costs of disability benefit program participation, and increase the
demand for the benefit; they may also lead the administrative authority to lower the
J-DSP-C, A control systems simulation environment: Labs and assessment
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T Thrasyvoulou, K Tsakalis ,FRONTIERS IN , 2003 ,mx1.epinnovations.com
Abstract–This paper presents various on-line computer laboratory exercises and related
assessment results for Java-Digital Signal-Processing-Controls (J-DSP-C). J-DSPC is an
object oriented simulation environment that is intended for control systems simulations. All
Using J-DSP to introduce communications and multimedia technologies to high schools
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A Spanias, T Thrasyvoulou, Y Song ,FRONTIERS IN , 2003 ,fie-conference.org
Abstract-This paper describes interactive Java software and modular web content
developed at Arizona State University aimed at introducing elements of digital signal
processing (DSP), multimedia, and communications technologies to high school (HS)
Compiler supports and optimizations for PAC VLIW DSP processors
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YC Lin, CL Tang, CJ Wu, MY Hung , and Compilers for , 2006 ,Springer
PAC DSP is a novel VLIW DSP processor exceedingly utilized with port-restricted, distinct
partitioned register file structures in addition to the heterogeneous clustered datapath
architecture to attain low power consumption and reduced die size; however, these
GigaOp DSP on FPGA
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BL Hutchings ,The Journal of VLSI Signal Processing, 2004 ,Springer
DSP algorithms such as automated target recognition and SONAR beamforming are a good
match for FPGA technology due to their regular structure, available parallelism, pipeline-
ability, and modest data word sizes. FPGA implementations of these applications
TMS320F240 DSP solution for obtaining resolver angular position and speed
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M Staebler ,Texas Instruments, Dallas, TX, Texas Inst. Application , 2000 ,ti.com.cn
Thanks to its peripherals, the Texas Instruments TI™ TMS320F240 DSP can be ideally used
for decoding the two resolver output signals as well as for generating the input reference
frequency. The hardware interfacing of the resolver to the TMS320F240 is shown and the
A PWM technique for DSP controlled ultrasonic motor drive system
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G Bal ,Electric Power components and systems, 2005 ,w3.gazi.edu.tr
In this study, a PWM technique is presented for digital signal processor controlled drive
system of travelling-wave ultrasonic motor. The drive system is high-frequency two-phase
serial-resonant inverter using mechanical resonant frequency of the ultrasonic motor. A
/index/RM178H27T2752645.pdf” > FREE DOWNLOAD Multidimensional exploration of software implementations for DSP algorithms
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E Zitzler, J Teich ,The Journal of VLSI Signal , 2000 ,Springer
When implementing software for programmable digital signal processors (PDSPs), the
design space is defined by a complex range of constraints and optimization objectives.
Three implementation metrics that are crucial in many PDSP applications are the program
Rapid control prototyping using MATLAB/Simulink and a DSP-based motor controller
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D Hercog ,International Journal of Engineering , 2005 ,ro.feri.uni-mb.si
A rapid control prototyping (RCP) system, based on commercially available software and
custom in-house developed hardware is presented. An RCP system successfully combines
the well-known simulation program MATLAB/Simulink and the custom DSP-based floating .
Compiler transformation of pointers to explicit array accesses in DSP applications
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B Franke ,Compiler Construction, 2001 ,Springer
Efficient implementation of DSP applications is critical for embedded systems. However,
current applications written in C, make extensive use of pointer arithmetic making compiler
analysis and optimisation difficult. This paper presents a method for conversion of a
DSP implementation of the retinex image enhancement algorithm
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GD Hines, Z Rahman, DJ Jobson , Information Processing XIII , 2004 ,cs.odu.edu
ABSTRACT The Retinex is a general-purpose image enhancement algorithm that is used to
produce good visual representations of scenes. It performs a non-linear spatial/spectral
transform that synthesizes strong local contrast enhancement and color constancy. A real-
Mapping of DSP algorithms on field programmable function arrays
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P Heysters, J Smit, G Smit ,Field-Programmable Logic and , 2000 ,Springer
This position paper 1 discusses reconfigurability issues in low-power hand-held multimedia
systems. A reconfigurable systems-architecture is introduced, with a focus on a Field
Programmable Function Array (FPFA). Application domain specific algorithms determine
System level virtual prototyping of DSP SOCs using grammar based approach
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A Hemani, AK Deb, J Oberg, A Postula ,Design Automation for , 2000 ,Springer
As we move from algorithm on a chip to system on a chip era, the design bottleneck is
shifting from individual DSP functions to global control that composes a system from these
functions. The practice in industry suffers from global control entering the design flow too
Extended synchronous dataflow for efficient DSP system prototyping
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C Park, J Jung ,Design Automation for Embedded Systems, 2002 ,Springer
Though synchronous dataflow (SDF) graph has been a successful input specification
language for digital signal processing (DSP) applications, lack of support for global states
makes it unsuitable for multimedia signal processing applications that need global states
Biochemical effects of the monoamine neurotoxins DSP-4 and MDMA in specific brain regions of MAO-B-deficient mice
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F Fornai, FS Giorgi, M Gesi, K Chen, MG Alessri ,Synapse, 2001 ,maps.org
ABSTRACT Previous studies reported that drugs acting as monoamine oxidase (MAO)-B
inhibitors prevented biochemical effects induced by the neurotoxins N-(2-chloroethyl)-N-
ethyl-2-bromobenzylamine (DSP-4) and 3, 4-methylenedioxymethamphetamine (MDMA,“
Intermediate representations for design automation of multiprocessor DSP systems
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N Bambha, V Kianzad, M Khandelia ,Design Automation for , 2002 ,Springer
Self-timed scheduling is an attractive implementation style for multiprocessor DSP systems
due to its ability to exploit predictability in application behavior, its avoidanceof over-
constrained synchronization, and its simplified clocking requirements. However, analysis
DSP-enabled compensation of demodulator phase error and sensitivity improvement in direct-detection 40-Gb/s DQPSK
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X Liu, S Chandrasekhar, AH Gnauck ,Proc. 32nd European , 2006 ,ecoc2006.org
Abstract We demonstrate a novel electronic compensation scheme for demodulator phase
error in directdetection 40-Gb/s DQPSK using a joint digital-signal-processing (DSP). Using
data-aided multi-symbol-phaseestimation, the DSP-enabled receiver also affords an
Fast automatic generation of DSP algorithms
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B Singer, Computational Science—ICCS , 2001 ,Springer
SPIRAL is a generator of optimized, platform-adapted libraries for digital signal processing
algorithms. SPIRAL’s strategy translates the implementation task into a search in an
expanded space of alternatives. These result from the many degrees of freedom in the
The evolution of DSP processors
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J Eyre ,IEEE Signal Processing Magazine, 2000 ,webcourse.cs.technion.ac.il
The number and variety of products that include some form of digital signal processing has
grown dramatically over the last five years. DSP has become a key component in many
consumer, communications, medical, and industrial products. These products use a
System level tools for DSP in FPGAs
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J Hwang, B Milne, N Shirazi ,Field-Programmable Logic and , 2001 ,Springer
Visual data flow environments are ideally suited for modeling digital signal processing
(DSP) systems, as many DSP algorithms are most naturally specified by signal flow graphs.
Although several academic and commercial frameworks provide a high level of
Design methodology of a low-energy reconfigurable single-chip DSP system
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M Wan, H Zhang, V George, M Benes ,The Journal of VLSI , 2001 ,Springer
In this paper, we first present a reconfigurable architecture template for low-power digital
signal processing, and then an energy conscious design methodology to bridge the
algorithm to architecture gap. The energy efficiency of such an architecture and the
Simulation Tools for Fixed Point DSP Algorithms and Architectures
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KB Cullen, GCM Silvestre ,Proc. International Conference , 2004 ,waset.ac.nz
C/C++ floating point
Open source software development should strive for even greater code maintainability
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Unlike the traditional closed source software (CSS), OSS can be freely used, modified, and redistributed. Its source code is also freely accessible A study of almost six million lines of code tracks how freely accessible source code holds up against time and multiple iterations
Static source code checking for user-defined properties
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Only a small fraction of the output generated by typical static analysis tools tends to reveal serious software defects. There are two main causes for this phenomenon. The first is that the typical static analyzer casts its nets too broadly, reporting everything reportable, rather
Plaggie: GNU-licensed source code plagiarism detection engine for Java exercises
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ABSTRACT A source code plagiarism detection engine Plaggie is presented. It is a stand- alone Java application that can be used to check Java programming exercises. Plaggies functionality is similar with previously published JPlag web service but unlike JPlag, Plaggie
A convolutional attention network for extreme summarization of source code
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Attention mechanisms in neural networks have proved useful for problems in which the input and output do not have fixed dimension. Often there exist features that are locally translation invariant and would be valuable for directing the models attention, but previous attentional
Using Heuristic Search Techniques To Extract Design Abstractions From Source Code .
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As modern software systems are large and complex, appropriate abstractions of their structure are needed to make them more understandable and, thus, easier to maintain. Software clustering tools are useful to support the creation of these abstractions. In this
Identifying authorship by byte-level n-grams: The source code author profile (scap) method
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Source code author identification deals with identifying the most likely author of a computer program, given a set of predefined author candidates. There are several scenarios where digital evidence of this kind plays a role in investigation and adjudication, such as code
Structured generative models of natural source code
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We study the problem of building generative models of natural source code (NSC); that is, source code written by humans and meant to be understood by humans. Our primary contribution is to describe new generative models that are tailored to NSC. The models are
Bimodal modelling of source code and natural language
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We consider the problem of building probabilistic models that jointly model short natural language utterances and source code snippets. The aim is to bring together recent work on statistical modelling of source code and work on bimodal models of images and natural
Reading source code .
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Source code is, among other things, a text to be read. In this paper I argue that reading source code is a key activity in software maintenance, and that we can profitably apply experiences and reading systems from text databases to the problem of reading source
Visualizing Software Product Line Variabilities in Source Code .
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Implementing software product lines is a challenging task. Depending on the implementation technique the code that realizes a feature is often scattered across multiple code units. This way it becomes difficult to trace features in source code which hinders
Source code instrumentation and quantification of events
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ABSTRACT Aspect-Oriented Programming is making quantified programmatic assertions over programs that otherwise are not annotated to receive these assertions. Varieties of AOP systems are characterized by which quantified assertions they allow, what they permit in the
A UNIX clone with source code for operating systems courses
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Students learn by doing, not by listening. Physicists and chemists have long understood this, which is why students in these fields are required to perform experiments in the laboratory and write up their findings. Computer scientists also realize this basic truth, so many courses
Architecture of a source code exploration tool: A software engineering case study
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We discuss the design of a software system that helps software engineers (SEs) to perform the task we call just in time comprehension (JITC) of large bodies of source code . We discuss the requirements for such a system and how they were gathered by studying SEs at
Phishing websites detection based on phishing characteristics in the webpage source code
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ABSTRACT World Wide Web Consortium (W3C) is the international standards organization for the World Wide Web (www). It develops standards, specifications and recommendations to enhance the interoperability and maximize consensus about the content of the web and
IRiSS-A Source Code Exploration Tool.
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Abstract IRiSS (Information Retrieval based Software Search) is a software exploration tool that uses an indexing engine based on an information retrieval method. IRiSS is implemented as an add-in to the Visual Studio .NET development environment and it allows
Source code review of the Diebold voting system
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This report is a security analysis of the Diebold voting system, which consists primarily of the AccuVote-TSX (AV-TSX) DRE, the AccuVote-OS (AV-OS) optical scanner, and the GEMS election management system. It is based on a study of the systems source code that we
Learning Unified Features from Natural and Programming Languages for Locating Buggy Source Code .
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Bug reports provide an effective way for end-users to disclose potential bugs hidden in a software system, while automatically locating the potential buggy source code according to a bug report remains a great challenge in software maintenance. Many previous studies
PDE4Java: Plagiarism Detection Engine For Java, Source Code : A Clustering Approach.
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The educational community across the world is facing the increasing problem of plagiarism. This widespread problem has motivated the need of an efficient, robust and fast detection procedure that is difficult to be achieved manually. The Plagiarism Detection Engine for Java
Intent operationalisation for source code generation
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In the research on software development, there was less achievement in an efficient general development methodology that could be effective and sufficient in dealing with a wide range of software problems related to different domains. Also a challenge of having a universal
for a DSP algorithm into a fixed point simulation model that
can be used to evaluate the numerical performance of the algorithm on several different
fixed point platforms including microprocessors, DSPs and FPGAs. The tools use a novel
Multifunction Dsp Based Real-Time Power Quality Analyzer
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D Gallo, C Landi ,XVIII IMEKO WORLD CONGRESS , 2006 ,imeko.org
Abstract: In the paper, the design and implementation of a high-performance real-time power
quality measuring instrument based on digital signal processor (DSP) is discussed. After the
hardware and firmware instrument description, the paper continues with the presentation
A 0.9 V low-power 16-bit DSP based on a top-down design methodology
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VATVTSVS Kawashima ,Fujitsu Sci. Tech. J, 2000 ,192.240.0.102
A 0.9 V low-power (8.7 mW) 16-bit DSP was developed for mobile wireless use using a 0.25
µm dual-threshold-voltage (dual-Vth) CMOS process. To obtain a high-performance LSI at a
low supply voltage and also to speed up the design process, we propose a new top-down
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