digital signal processing-dsp-45




Configurable microprocessor array for DSP applications
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O Maslennikow, J Shevtshenko ,Parallel Processing and , 2004 ,Springer
The configurable microprocessor array for DSP applications is proposed, in which each cell
is the microprocessor with RISC architecture, represented as a soft IP-core. This IP-core is
generated automatically by the special soft-core generator, which is based on the 

DSP in high performance oscilloscopes
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JJ Pickerd ,Tektronix™ White Paper, 2005 ,scope-shop.info
Abstract: The digital signal processing revolution began around 1980 as the first dedicated
digital signal processors began to appear. Since that time DSP has been incorporated into
just about every aspect of modern electronics. Oscilloscopes are no exception. Digital 

Design and implementation of a high-performance and complexity-effective VLIW DSP for multimedia applications
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TJ Lin, SK Chen, YT Kuo, CW Liu ,Journal of Signal , 2008 ,Springer
Abstract This paper presents the design and implementation of a novel VLIW digital signal
processor (DSP) for multimedia applications. The DSP core embodies a distributed & ping-
pong register file, which saves 76.8% silicon area and improves 46.9% access time of 

Design of a biped robot using DSP and FPGA
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S Oh, SU Lee ,International Journal of Control, Automation, and , 2003 ,ijcas.com
Abstract: A biped robot should be designed to be an effective mechanical structure and have
smaller hardware system if it is to be a stand-alone structure. This paper shows the design
methodology of a biped robot controller using FPGA (Field Programmable Gate Array). A 

Real-time implementation of a new contour tracking procedure in a multi-processor DSP system
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V Gemignani, M Demi, M Paterni ,Proc. Circuits, Systems, , 2000 ,wseas.us
Abstract:-In this paper the implementation of a contour tracking procedure is presented. If a
rough contour of the desired structure is available on the first frame of a sequence, the
contours on the subsequent frames are automatically outlined in real time. Furthermore, 

MOUSE: A shortcut from matlab source to SIMD DSP assembly code
FREE DOWNLOAD [PDF] from tu-dresden.de
G Cichon ,Computer Systems: Architectures, Modeling, and , 2004 ,Springer
This article presents a novel design flow called MOUSE for the effective development of
digital signal processing systems in terms of development time, performance and power
consumption. It uses a model in high-level language like Matlab as a starting point. 

DSP Techniques for Determining “Wow” Distortion
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J KOTUS, M KULESZA ,J. Audio Eng. Soc, 2007 ,prestocentre.org
Algorithms for determining the wow distortion characteristic are proposed. These are the
power-line-hum tracking algorithm, the high-frequency-bias tracking algorithm, and the
algorithm based on an adaptive analysis of the center of gravity of the spectrum of the 

DSP implementation of real time edge detectors
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V Gemignani, M Demi, M Paterni ,the Proceedings of , 2001 ,wseas.us
Abstract:-In image processing, the real time execution of contour tracking algorithms is a
challenging operation. In fact, the detection and tracking of an edge through a sequence of
images, require the performing of demanding algorithms. This paper presents the real 

Simplified sensorless control for BLDC Motor using DSP technology
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JW Dixon, M Rodríguez ,the 19th International Battery, 2002 ,ing.puc.cl
Abstract This paper describes a simple way to control, in a sensorless way, a Brushless DC
(BLDC) motor for electric vehicle applications. To control this machine it is generally
required to count with a position sensor because the inverter phases, acting at any time, 

Grasping the potential of digital signal processing through real-time DSP laboratory experiments
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AJS Ferreira ,IEEE Signal Processing Society’s 2nd Signal , 2002 ,fe.up.pt
ABSTRACT A new DSP laboratory course has been included in the Electrical and Computer
Engineering curriculum at the Faculdade de Engenharia da Universidade do Porto, in
Portugal, since the school year of 1999/2000. This paper addresses the context and 

DSP-based fast fuzzy logic controllers
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I Kalaykov, B Iliev ,Proc. of the Third European DSP , 2000 ,focus.ti.com
Abstract This paper presents an approach to implementing a fast FLC on a DSP in order to
achieve high speed operation with a small sampling interval. This approach uses some
specific techniques for hardware-software co-design, where hardware-specific properties 

Application of DSP in the step-frequency RCS measurement system
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CF Hu, JD Xu, NJ Li ,PIERS Online, 2008 ,piers.org
Abstract—Step-Frequency RCS measurement system is a new and remarkable RCS
measurement system, which can obtain the response of target at each frequency point in an
anecho chamber. Comparing it with traditional way of CW RCS measurement, more 

‘Interactive DSP education using MATLAB demos
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U Rajashekar  Proc. First Signal Processing , 2000 ,spib.ece.rice.edu
In this paper, we present a suite of interactive Digital Signal Processing (DSP)
demonstration modules developed using MATLAB. Equipped with informative visualizations
and a userfriendly interface, these modules are used effectively in a classroom 

DSP based power quality analyzer using new signal processing algorithms for detection and classification of disturbances in a single-phase power system
FREE DOWNLOAD [PDF] from bme.hu
PM Ramos, T Radil, FM Janeiro ,Proc. IMEKO TC4 Symp, 2007 ,mit.bme.hu
Abstract-This paper describes the prototype of a power quality analyzer designed for real-
time detection and classification of disturbances that occur in a single-phase power system.
The previously developed algorithm for disturbance detection and classification was 
.

Analysis of RNS-FPL synergy for high throughput DSP applications: Discrete wavelet transform
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J Ramírez, A García, P Fernández, L Parrilla , Logic and Applications: , 2000 ,Springer
This paper focuses on the implementation over FPL devices of high throughput DSP
applications taking advantage of RNS arithmetic. The synergy between the RNS and
modern FPGA device families, providing built-in tables and fast carry and cascade chains, 

Design and implementation of a single-channel ECG amplifier with DSP post-processing in Matlab
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CM Tenedero, MAD Raya ,Third National , 2002 ,bahramelectronic.persiangig.com
ABSTRACT An electrocardiogram (ECG) signal is measured by an ECG amplifier, which is a
bioelectric amplifier that usually has a gain of 1000. A standard ECG amplifier consists of an
instrumentation amplifier (IA) followed by an isolation amplifier (iso-amp), then by a 

Re-usable low power DSP IP embedded in an ARM based SoC architecture
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HH Hellmich, AT Erdogan ,COLLOQUIUM DIGEST-IEE, 2000 ,see.ed.ac.uk
Abstract The integration of different re-usable IPs (Intellectual Properties) to design SoC
(System-on-Chip) devices is widely accepted as the key to achieving higher productivity to
meet shorter time-to-market demands. Nevertheless, productivity improvements suffer 

Optimal output filter design for microprocessor or DSP power supply
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R Miftakhutdinov ,Analog Applications, 2000 ,ti.com
Tight dynamic tolerances for supply voltages of next-generation microprocessors and DSPs
at high slew-rate transitions from sleep mode to full-power operation and backwards require
fast-transient-response power supplies along with a special decoupling technique. The 

Copy propagation optimizations for VLIW DSP processors with distributed register files
FREE DOWNLOAD [PDF] from nthu.edu.tw
CJ Wu, SY Chen ,Languages and Compilers for Parallel , 2007 ,Springer
High-performance and low-power VLIW DSP processors are increasingly deployed on
embedded devices to process video and multimedia applications. For reducing power and
cost in designs of VLIW DSP processors, distributed register files and multi-bank register 

Repeated administration of the noradrenergic neurotoxin N-(2-chloroethyl)-N-ethyl-2-bromobenzylamine (DSP-4) modulates neuroinflammation and amyloid
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PL Pugh, MP Vidgeon-Hart, T Ashmeade ,J , 2007 ,biomedcentral.com
Abstract Background: Data indicates anti-oxidant, anti-inflammatory and pro-cognitive
properties of noradrenaline and analyses of post-mortem brain of Alzheimer’s disease (AD)
patients reveal major neuronal loss in the noradrenergic locus coeruleus (LC), the main 

Memory-constrained block processing for DSP software optimization
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MY Ko   Journal of Signal Processing , 2008 ,Springer
Abstract Digital signal processing (DSP) applications involve processing long streams of
input data. It is important to take into account this form of processing when implementing
embedded software for DSP systems. Task-level vectorization, or block processing, is a 

DSP programming with Faust, Q and SuperCollider
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Y Orlarey, A Gräf ,Proceedings of the 4th International Linux , 2006 ,lac.zkm.de
Abstract Faust is a functional programming language for realtime signal processing and
synthesis that targets high-performance signal processing applications and audio plugins.
The paper gives a brief introduction to Faust and discusses its interfaces to Q, a 

Loop scheduling with timing and switching-activity minimization for VLIW DSP
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Z Shao, C Xue, Q Zhuge, EH Sha ,ACM Transactions on , 2006 ,utdallas.edu
In embedded systems, high-performance DSP needs to be performed not only with high-
data throughput but also with low-power consumption. This article develops an instruction-
level loopscheduling technique to reduce both execution time and bus-switching activities 

Modeling and implementation of dsp fpga solutions
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RD Turney, C Dick, DB Parlour , Conference on Signal , 2000 ,origin.xilinx.com
ABSTRACT Recent developments in the simulation capabilities of high level mathematical
modeling tools have opened exciting new design flow possibilities. System level support for
bit true modeling enables a designer to use a single environment to create floating and 


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