Effectively power planning


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Power planning Guidlines

• Plan for each power supply in the floorplan and routing plan separately and
in order of importance and complexity. For example, some supplies may be
localized, such as the supply for an embedded memory, and therefore are
lower in priority.
• Don’t forget to plan for different substrate and well regions. For example, a
negative VBB and VSS cannot connect directly to the same P+ substrate, so
for a VBB substrate we have to plan for the added overhead of extra substrate
connections.
• Power supply generators are tricky to floorplan, as they ideally should be
close to the circuitry to which they supply power. This increases their effectiveness
by reducing the required power supply grid to achieve reasonable
parasitic resistances.

• Define all the powers appropriately in the command files for layout
verification; otherwise, connectivity checks will not work. This includes
definition of devices and substrate areas.
• Isolate large consumers of power with separate supply lines. I/O buffers are
a good example, as most of the noise and surges will be isolated.
• Place reservoir capacitors for internal power supply generators close to the
generators. These capacitors act essentially as batteries during high current
consumption periods. Locating the reservoir capacitors away from the generator
reduces the charging ability of the generator to the capacitors.
• Use clamping diodes to protect internal supplies from large power supply
variations. Should the external power connection to the chip be oppositely
applied, the VDD to VSS clamp diodes serve to limit the reverse voltage. As
well, power supply diodes often form part of the overall chip ESD protection
path.


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