free -FPGA
Firm-core virtual FPGA for just-in-time FPGA compilation
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Abstract Just-in-time (JIT) compilation has been used in many applications to enable standard software binaries to execute on different underlying processor architectures, yielding software portability benefits. Researchers previously introduced the concept of a
National Instruments
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NI Single-Board RIO devices are designed to be easily embedded in high-volume applications that require flexibility, high performance, and reliability. NI sbRIO-96xx devices feature an industrial Freescale MPC5200 real-time processor with speeds up to 400 MHz forNo part of this work be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, microfilming, recording or otherwise, without written permission from the Publisher, with the exception of any material
Xilinx stacked silicon interconnect technology delivers breakthrough FPGA capacity, bandwidth, and power efficiency
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As the role of the FPGA becomes more dominant in system design, the designs grow larger and more complex, demanding higher logic capacity and more on-chip resources. To date, FPGAs have depended predominantly on Moores Law to respond to this need, delivering
OneChip: an FPGA processor with reconfigurable logic.
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This thesis describes a processor architecture called OneChip, which combines a fixed logic processor core and reconfigurable logic resources. Using the variable components of this architecture, the performance of speed-critical applications can be improved by customizing
An FPGA -Based Performance Evaluation of the AES Block Cipher Candidate Algorithm Finalists
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The technical analysis used in determining which of the potential Advanced Encryption Standard candidates was selected as the Advanced Encryption Algorithm includes efficiency testing of both hardware and software implementations of candidate algorithms
A 7.663-TOPS 8.2-W energy-efficient FPGA accelerator for binary convolutional neural networks
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ABSTRACT FPGA -based hardware accelerators for convolutional neural networks (CNNs) have obtained great attentions due to their higher energy efficiency than GPUs. However, it is challenging for FPGA -based solutions to achieve a higher throughput than GPUEmbedded- and real-time system designers are continually challenged to provide increased computational capabilities to meet tighter system requirements at ever-improving price/performance ratios. Best practices have long promoted the use of commercial off-the- shelf (COTS) components
FPGA embedded processors
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Embedding a processor inside an FPGA has many advantages. Specific peripherals can be chosen based on the application, with unique user-designed peripherals being easily attached. A variety of memory controllers enhance the FPGA embedded processor systemsA~ YN~ NR~ N~ U~ cutcum are becoming more prevalent. Most commonly they occur in the interfaces and the glue logic that binds the components of a system. Two reasons for this are that asynchronous logic is adaptable to delay variations and components designed to
approach to the decomposition of incompletely specified multi-output functions based on graph coloring and local transformations and its application to FPGA
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The paper presents a new approach to the decomposition of incompletely specified Boolean functions and its application to LUT-based FPGA mapping. Three methods were developed: the fast Graph Coloring to pe form a quasi-optimum dont care assignment, the Variable
Design and implementation of FPGA -based systems-a review
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This paper reviews the state of the art of field programmable gate array ( FPGA ) with the focus on FPGA -based systems. The paper starts with an overview of FPGA in the previous literature, after that starts to get an idea about FPGA programming. FPGA -based neural
Radiation test results of the Virtex FPGA and ZBT SRAM for space based reconfigurable computing
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Abstract A comprehensive Single Event Effects (SEE) characterization of advanced commercial technologies was conducted using the heavy-ion test facility at Texas AM. The components evaluated included a 32 000 gate Virtex reprogrammable FPGA (XQVR300)
Neural network implementation using FPGA : issues and application
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Hardware realization of a Neural Network (NN), to a large extent depends on the efficient implementation of a single neuron. FPGA -based reconfigurable computing architectures are suitable for hardware implementation of neural networks. FPGA realization of ANNs with a
Partial FPGA rearrangement by local repacking
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Partial rearrangement of executing tasks has been proposed as a means of alleviating the fragmentation of free logic elements that occurs on space {shared run {time recon gurable FPGA systems. In this paper, we present and assess a new solution to this strategy. Local
Iterative and adaptive slack allocation for performance-driven layout and FPGA routing
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We give a generalization, called the limit-bumping algorithm (LBA), of a procedure of Youssef et. al. that transfonns initial connection delays into upper limits on delay suitable for performance-driven layout. ZBA is a simple way to distribute slacks using arbitrary
Design of FPGA based sliding mode controller for robot manipulator
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One of the most active research areas in the field of robotics is robot manipulators control, because these systems are multi-input multi-output (MIMO), nonlinear, and uncertainty. At present, robot manipulators is used in unknown and unstructured situation and caused to
FPGA performance versus cell granularity
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An experimental approach is used to investigate the relationship between the performance of an FPGA and its basic cell granularity. Over a large set of design examples it is found that a 4 or 5 input cell achieves minimum average critical path delay for a wide range of
A real-time FPGA implementation of a barrel distortion correction algorithm with bilinear interpolation
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This paper presents a novel FPGA implementation of a barrel distortion correction algorithm with a focus on reducing hardware complexity. In order to perform real-time correction in hardware the undistorted output pixels must be produced in raster order. To do this the
A reconfigurable computing architecture for implementing artificial neural networks on FPGA
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Artificial Neural Networks (ANNs), and the backpropagation algorithm in particular, is a form of artificial intelligence that has traditionally suffered from slow training and lack of clear methodology to determine network topology before training starts. Past researchers have
Logical hardware debuggers for FPGA -based systems
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Field programmable gate arrays (FPGAs) have become a popular technology for creating digital systems since they can lead to a shorter time-to-market for designs than application- specific integrated circuits (ASICs) and allow design modifications to be made after system
Efficient FPGA implementations of high-dimensional cube testers on the stream cipher Grain-128
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Cube testers are a generic class of methods for building distinguishers, based on cube attacks and on algebraic property-testers. In this paper, we report on an efficient FPGA implementation of cube testers on the stream cipher Grain-128. Our best result (a
FPGA -based Real-time Optical Flow Algorithm Design and Implementation.
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Optical flow algorithms are difficult to apply to robotic vision applications in practice because of their extremely high computational and frame rate requirements. In most cases, traditional general purpose processors and sequentially executed software cannot compute optical
A potentially implementable FPGA for quantum dot cellular automata
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While still relatively new , the quantum-dot cellular automata (QCA) appears to be able to provide many of the properties and functionalities that have made CMOS successful over the past several decades. Early experiments have demonstrated and realized most, if not all, of
FPGA -based fuzzy logic: design and applications-a review
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A large numbers of fuzzy control applications with the physical systems require a real-time operation to interface high speed constraints; higher density programmable logic devices such as field programmable gate array ( FPGA ) can be used to integrate large amounts of
Efficient FPGA implementation of FFT/IFFT processor
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The Fast Fourier Transform (FFT) and its inverse (IFFT) are very important algorithms in signal processing, software-defined radio, and the most promising modulation technique; Orthogonal Frequency Division Multiplexing (OFDM). This paper explains the
Optical network and FPGA /DSP based control system for free electron laser
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The work presents a structural and functional model of a distributed low level radio frequency (LLRF) control, diagnostic and telemetric system for a large industrial object. An example of system implementation is the European TESLA-XFEL accelerator. The free
Comparison between haar and daubechies wavelet transformions on FPGA technology
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( FPGA ) technology offers the potential of designing high performance systems at low cost. The discrete wavelet transform has gained the reputation of being a very effective signal analysis tool for many practical applications. However, due to its computationintensive
Single-event upset simulation on an FPGA
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FPGAs have become an appealing solution for space-based remote sensing applications. However, in a low-earth orbit, FPGAs are susceptible to Single Event Upsets (SEUs). In order to overcome their effects, an SEU simulator based on the SLAAC-1V computing board
Methodology of FPGA -based mathematical error-based tuning sliding mode controller
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Most of nonlinear controllers need real time mobility operation so one of the most important devices which can be used to solve this challenge is Field Programmable Gate Array ( FPGA ). FPGA can be used to design a controller in a single chip Integrated Circuit (IC)
BORPH: An operating system for FPGA -based reconfigurable computers
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Reconfigurable computing is a promising technology to meet future computational demand by leveraging flexibilities and the high degree of parallelism found in reconfigurable hardware fabrics, such as field programmable gate arrays (FPGAs). However, despite their
Proton testing of SEU mitigation methods for the Virtex FPGA
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Total ionizing dose (TID), heavy ion and proton characterization have previously been performed on Virtex FPGAs, fabricated on epitaxial silicon, to evaluate the onorbit radiation performance expected for this technology. The dominant risk is Single Event Upset (SEU)
An evolvable hardware system in Xilinx Virtex II Pro FPGA
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In this paper, a new circuit architecture for image filter evolution is proposed. The evolvable system is based on the implementation of a search algorithm in the PowerPC processor which is available in Xilinx Virtex II Pro Field Programmable Gate Arrays (FPGAs)
Survey and analysis of hardware cryptographic and steganographic systems on FPGA
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Little brooks make great rivers says a proverb. Information science involves not only the efforts made for gathering, acquiring or collecting the data that corresponds to the information but also contains the ways to save it, protect it and preserve it. The meaning of
CoRAM: An in-fabric memory abstraction for FPGA -based computing
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FPGAs have been used in many applications to achieve orders-of-magnitude improvement in absolute performance and energy efficiency relative to conventional microprocessors. Despite their newfound potency in both processing performance and energy efficiency
FPGA implementation of a HOG-based pedestrian recognition system
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With respect to road crash statistics, on-board pedestrian detection is a key task for future advanced driver assistance systems. In this paper, we describe the implementation of a realtime pedestrian recognition system that combines FPGA -based extraction of image
An FPGA -based implementation for median filter meeting the real-time requirements of automated visual inspection systems
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Image processing is a very important field within factory automation, and more concretely, in the automated visual inspection. The main challenge normally is the requirement of real- time results. On the other hand, in many of these applications, the existence of impulsive
DCT and IDCT implementations on different FPGA technologies
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In this paper we investigate hardware implementations of 8x8 DCT and IDCT on different FPGA technologies using the modified Loeffler algorithm. The investigations involved simulations and synthesis of VHDL code utilizing recent FPGA families of Xilinx, Altera, and
An overview of FPGAs and FPGA programming-Initial experiences at Daresbury
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This report will provide a brief introduction to Field Programmable Gate Arrays (FPGAs), the key reasons for their emergence into the High Performance Computing (HPC) market and the difficulties of assessing their performance against that of conventional microprocessors
Volatile FPGA design security a survey
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Volatile FPGAs, the dominant type of programmable logic devices, are used for space, military, automotive, and consumer electronics applications which require them to operate in a wide range of environments. Their continuous growth in both capability and capacity now CSE PROJECTS