partial configuration research papers


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Correcting single-event upsets through Virtex partial configuration
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C Carmichael, M Caffrey , Notes, XAPP216 (v1. , 2000 ,atlas-proj-tgc.web.cern.ch
Summary This application note describes the use of partial reconfiguration in Virtex™ series
FPGAs for the purpose of correcting Single Event Upsets to the configuration memory array
induced by cosmic rays. It is essential for the reader to have a basic understanding of the 

Relocation and Automatic Floor-planning of FPGA Partial Configuration Bit-Streams
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J Carver, N Pittman ,2008 ,research.microsoft.com
ABSTRACT An extensible processor provides a standard data-path and one or more
regions for use as application-specific reconfigurable logic. In this paper we address two
problems that arise in the practical use of extensible processors. Using multiple extensible 

Dynamic partial self-reconfiguration on spartan-III FPGAs via a parallel configuration access port (PCAP)
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S Bayar ,2nd HiPEAC workshop on Reconfigurable , 2008 ,cmpe.boun.edu.tr
Abstract. This paper presents an alternative approach for dynamic partial self-
reconfiguration that enables a Field Programmable Gate Array (FPGA) to reconfigure itself
dynamically and partially through a parallel configuration access port (PCAP) under the 

Configuration of p-cycles in WDM networks with partial wavelength conversion
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DA Schupke, MC Scheffel ,Photonic Network , 2003 ,Springer
The p-cycle concept offers a capacity-efficient and rapid protection mechanism for mesh-
restorable networks. This work investigates the configuration of span protecting p-cycles in
wavelength division multiplexing (WDM) networks with limited wavelength conversion. An 

Relocation of FPGA Partial Configuration Bit-Streams for Soft-Core Microprocessors
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J Carver, N Pittman ,Workshop on Soft Processor , 2008 ,eecg.toronto.edu
ABSTRACT With dynamic partial reconfiguration (PR) we can augment a softcore with
application specific blocks that may change, or reconfigure, during run-time. In this paper we
address some of the inefficiencies in available FPGA tool flows by using bit-stream 

Generic software component configuration via partial evaluation
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AF Le Meur  2000 ,hal.archives-ouvertes.fr
We propose the use of partial evaluation as a mean to configure automatically and
systematically software components in a predictable way. We based our approach on a
declaration language, which enables the component programmer to describe the 

Configuration sharing to reduce reconfiguration overhead using static partial reconfiguration
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J Sungjoon ,IEICE Trans Inf Syst, E, 2008 ,atom.kaist.ac.kr
SUMMARY Reconfigurable architectures are one of the most promising solutions satisfying
both performance and flexibility. However, reconfiguration overhead in those architectures
makes them inappropriate for repetitive reconfigurations. In this paper, we introduce a 

Design frameworks and configuration controllers for dynamic and partial reconfiguration
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E Carvalho, F Möller  PPGCC-PUCRS Technical , 2004 ,pucrs.br
Abstract. Dynamically reconfigurable systems, especially those where the hardware can be
changed during runtime, have the potential to provide hardware with flexibility similar to that
of software. At the same time, they may lead to better performance and smaller system 

Configuration space with labels in a partial abelian monoid
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S Okuyama ,kagawa-nct.ac.jp
Synopsis G. Segal’s approximation theorem asserts that the configuration space with labels
in a path-connected space has the homotopy type of iterated loop-suspension of the space.
In this paper we give a definition of the configuration space with labels in a partial abelian 

Two Reactors in Series–The Effect of Oxygen Partial Pressure and Configuration upon Yield _
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C upon Yield , OF N–BUTANES IN INERT POROUS , 2008 ,wiredspace.wits.ac.za
In this thesis I have used the two acronyms FBR (fixed bed reactor) and PFR (plug flow
reactor) to describe a reactor in which the initial oxygen partial pressure is permitted to wane
in accordance with the ODH process. In this chapter, the acronym FBR is used.

Analysis and Experiment of Cross-tied Configuration of Partial Shaded PV Array
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B Yu, E Kim, G Kang, K Kim, S Kim, G Yu ,iht.univ.kiev.ua
ABSTRACT: In this paper, four configurations of PV array are analyzed and tested for
comparison, where four configurations are series-parallel, series-parallel-bypass diode, total-
cross-tied and total-cross-tied-bypass diode configuration. Each photovoltaic module is 


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