sources of jitter in pll

Common sources of jitter include:

Internal circuitry of the phase-locked loop (PLL)
Random thermal noise from a crystal
Other resonating devices
Random mechanical noise from crystal vibration
Signal transmitters
Traces and cables
Beyond these sources, termination dependency, cross talk, reflection, proximity effects, VCC sag, ground bounce, and electromagnetic interference (EMI) from nearby devices and equipment can also increase the amount of jitter in a device.

Reflection and cross-talk frequency-dependent effects may be amplified if an adjacent signal is synchronous and in phase. Aside from noise caused by power supplies and ground, changes in circuit impedance are responsible for most of the jitter in data transmission circuits.

Jitter Components

The two major components of jitter are random jitter, and deterministic jitter.

Random Jitter

The random component in jitter is due to the noise inherent in electrical circuits and typically exhibits a Gaussian distribution. Random jitter (RJ) is due to stochastic sources, such as substrate and power supply. Electrical noise interacts with the slew rate of signals to produce timing errors at the switching points.

RJ is additive as the sum of squares, and follows a bell curve. Since random jitter is not bounded, it is characterized by its standard deviation (rms) value.

Deterministic Jitter

Deterministic jitter (DJ) is data pattern dependant jitter, attributed to a unique source. Sources are generally related to imperfections in the behavior of a device or transmission media but may also be due to power supply noise, cross-talk, or signal modulation.

DJ is linearly additive and always has a specific source. This jitter component has a non-Gaussian probability density function and is always bounded in amplitude. DJ is characterized by its bounded, peak-to-peak, value.

Types of Jitter

There are many different types of jitter. Period jitter, cycle-to-cycle jitter and half-period jitter are described below.

Period Jitter

Period jitter is the change in a clock’s output transition (typically the rising edge) from its ideal position over consecutive clock edges. Period jitter is measured and expressed in time or frequency. Period jitter measurements are used to calculate timing margins in systems, such as tSU and tCO.

Cycle-to-Cycle Jitter

Cycle-to-cycle jitter is the difference in a clock’s period from one cycle to the next. Cycle-to-cycle jitter is the most difficult to measure usually requiring a timing interval analyzer.