# free research papers-VLSI-ASIC

- ASIC and FPGA implementations of H. 264 DCT and quantization blocks
- Impact of interconnect pattern density information on a 90nm technology ASIC design flow
- The coincidence matrix ASIC of the level-1 muon barrel trigger of the ATLAS experiment
- A flexible multi-channel high-resolution time-to-digital converter ASIC
- Leakage power estimation for deep submicron circuits in an ASIC design environment
- Architectures for ASIC implementations of low-density parity-check convolutional encoders and decoders
- ASIC implementation of a MIMO-OFDM transceiver for 192 Mbps WLANs
- Yield enhancement of programmable ASIC arrays by reconfiguration of circuit placements
- Receiver ASIC for timing, trigger and control distribution in LHC experiments
- Performance of a low noise front-end ASIC for Si/CdTe detectors in Compton gamma-ray telescope
- Secure contactless smartcard ASIC with DPA protection
- Selectively Patterned Masks: Structured ASIC with Asymptotically ASIC Performance
- AN ASIC IMPLEMENTATION OF THE TWO-DIMENSIONAL DISCRETE COSINE TRANSFORM
- Design and Implementation of a Parallel Turbo-Decoder ASIC for 3GPP-LTE
- Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC

ASIC and FPGA implementations of H. 264 DCT and quantization blocks Impact of interconnect pattern density information on a 90nm technology ASIC design flow The coincidence matrix ASIC of the level-1 muon barrel trigger of the ATLAS experiment A flexible multi-channel high-resolution time-to-digital converter ASIC Leakage power estimation for deep submicron circuits in an ASIC design environment Architectures for ASIC implementations of low-density parity-check convolutional encoders and decoders ASIC implementation of a MIMO-OFDM transceiver for 192 Mbps WLANs Yield enhancement of programmable ASIC arrays by reconfiguration of circuit placements Receiver ASIC for timing, trigger and control distribution in LHC experiments Performance of a low noise front-end ASIC for Si/CdTe detectors in Compton gamma-ray telescope Secure contactless smartcard ASIC with DPA protection Selectively Patterned Masks: Structured ASIC with Asymptotically ASIC Performance AN ASIC IMPLEMENTATION OF THE TWO-DIMENSIONAL DISCRETE COSINE TRANSFORM Design and Implementation of a Parallel Turbo-Decoder ASIC for 3GPP-LTE Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC

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ASIC and FPGA implementations of H. 264 DCT and quantization blocks

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