digital signal processing-dsp-44


FREE IEEE PAPERS

Enhancing the DSP Toolkit of LabVIEW
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M Tanyel ,in, 2002 ,visl.technion.ac.il
Abstract Most Digital Signal Processing (DSP) courses rely heavily on MATLAB and/or C,
representing the state of the art in textual programming, for their standard computer tools.
Many textbooks are published containing examples, if not sections, devoted to these 

Efficient software implementation of the Max-log-MAP turbo decoder on the starcore SC140 DSP
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A Chass, A Gubeskys ,Proc. of the Intl. Conf. on Signal , 2000 ,heehiee.codns.com
ABSTRACT Since the invention of turbo codes in 1993, a lot of efforts have been invested in
the efficient implementation of turbo decoders. Due to the high computational complexity of
the turbo codes decoding algorithms, the common decoder implementation is based on a 

A local-conscious global register allocator for VLIW DSP processors with distributed register files
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CH Lu, YC Lin, YP You ,International Workshop on , 2007 ,people.cs.nctu.edu.tw
Abstract. Embedded processors developed in recent years have attempted to employ novel
hardware design to reduce ever-growing complexity, power dissipation, and die area. While
using a distributed register file architecture with irregular accessing constraints is 

DSP based robust controller of BLDC servo motor
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C Rusu ,DAS2004 Proceedings, of the 7th International , 2004 ,dasconference.ro
Abstract This paper proposed a sliding mode fuzzy controller–SMFC, for a brushless DC
motors used in motion control applications. The design procedure is based on a sliding
mode controller with boundary layer (SMC-BL). The procedure presented, is focuses upon 

Compiler optimizations with dsp-specific semantic descriptions
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YC Lin, YS Hwang ,Languages and Compilers for Parallel , 2005 ,Springer
Due to the specialized architecture and stream-based instruction set, traditional DSP
compilers usually yield poor-quality object codes. Lack of an insight into the DSP
architecture and the specific semantics of DSP applications, a compiler would have 

Development of Technical Concepts of DSP into smart meters
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K Samarakoon, J Ekanayake ,Centre for Distributed , 2008 ,nextds.it
The interest for demand side participation (DSP) through efficient use of energy has recently
increased as an attempt to reduce green house gas emissions and to reduce the increasing
dependence of imported fossil fuels. However the presently installed electromechanical 

Design and characterization of a low power ternary DSP
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M Aline, T Saidi, E Kinvi-Boh ,International Signal , 2003 ,stiemie.dyndns.org
ABSTRACT This paper deals with design and performance estimation of typical units blocks
of a ternary DSP using SUS-LOC concepts. SUS-LOC enables the design of ternary logic
cells and is based upon the use of enhanced and depleted MOS transistors. After the 

A compact dsp core with static floating-point arithmetic
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TJ Lin, HY Lin, CM Chao, CW Liu ,The Journal of VLSI Signal , 2006 ,Springer
Abstract A multimedia system-on-a-chip (SoC) usually contains one or more programmable
digital signal processors (DSP) to accelerate data-intensive computations. But most of these
DSP cores are designed originally for standalone applications, and they must have some 

Initial clinical verification of a DSP instrument
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D Schum ,Hear Rev, 2002 ,oticonusa.com
Results Experienced Users. Figure 1 provides the data from the experienced users. For
each dimension, the category shown on the left (ie, red bar) represents the response “Own
hearing aid much better” and the category shown on the right (dark green bar) represents 

Serial LDPC decoding on a SIMD DSP using horizontal-scheduling
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M Gomes, V Silva, C Neves ,Proc. 14th European Signal , 2006 ,eurasip.org
ABSTRACT In this paper we propose an efficient vectorized low density parity check (LDPC)
decoding scheme based on the min-sum algorithm and the horizontal scheduling method.
Also, the well known forward-backward algorithm, used in the check-node messages 

Virtex-II DSP Engines Enable Software Defined Radio
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K DoCosta ,Xcell Journal, 2001 ,cs.york.ac.uk
However, the most common approach is to use a multiply-accumulate (MAC) unit.
Depending on the performance required, you may need multiple MAC units for your filter
design. The Virtex-II architecture is ideal for implementing multiple MACs. The 

Development of an efficient DSP compiler based on open64
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SK De, A Dasgupta, S Kushwaha ,Open64 Workshop at , 2008 ,capsl.udel.edu
ABSTRACT In this paper we describe the development of an efficient compiler for digital
signal processors (DSP) based on the Open64 compiler infrastructure. Our development has
focused on state-of-the-art DSP architectures that allow high degree of instruction level 

A Java-Enabled DSP
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C Glossner, M Schulte ,Embedded processor design , 2002 ,Springer
In this paper we explore design techniques and constraints for enabling high-speed Java-
enabled wireless devices. Since Java execution may be required for 3G devices, efficient
methods of executing Java bytecode are explored. We begin by setting a historical context 

Dsp based acoustic vehicle classification for multi-sensor real-time traffic surveillance
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A Klausner, S Erb ,Proceedings of EUSIPCO, 2007 ,eurasip.org
ABSTRACT Vehicles may be recognized from the sound they emit when driving along a
road. Characteristic acoustic finger prints and audio features can be used to increase the
robustness of existing video based vehicle tracking and classification algorithms. Using 

Laboratory experiments unifying concepts in the communications, digital signal processing (DSP) and very large scale integration (VLSI) courses
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RP Ramachandran, LM Head ,Proceedings of 2003 , 2003 ,users.rowan.edu
Abstract-The hallmark of the Rowan College of Engineering undergraduate program is to
provide effective laboratory based instruction that illustrates important scientific concepts.
This paper presents the results of an effort by the Department of Electrical and Computer 

The CBP Parameter: A Module Characterization Approach for DSP Software Optimization
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SS Bhattacharyya ,The Journal of VLSI Signal Processing, 2004 ,Springer
Memory consumption is an important metric for DSP software implementation. In this paper,
we develop a module characterization technique that promotes more economical use of
memory resources at the system level. Our work is developed in the context of software 

Mapping DSP applications to a high-performance reconfigurable coarse-grain data-path
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M Galanis, G Theodoridis, S Tragoudas , Logic and Application, 2004 ,Springer
A high-performance reconfigurable coarse-grain data-path, part of a hybrid reconfigurable
platform, is introduced. The data-path consists of coarse grain components that their
flexibility and universality is shown to increase the system’s performance due to significant 

The Death of the DSP
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N Tredennick ,2000 ,2.dx1.elecfans.com
Design methods Before the microprocessor, engineers solved problems directly. That is,
they selected hardware resources and mapped the algorithm directly into hardware. Anyone
who reverse engineered a circuit could determine the problem it solved. Direct hardware 

Influence of fixed-point DSP architecture on computation accuracy
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D Menard, P Quémerais XI European Signal , 2002 ,eurasip.org
ABSTRACT The minimization of cost, power consumption and development time of DSP
applications requires the development of methodologies for the automatic implementation of
floating point algorithms in fixed point architectures. In this paper, the influence of the DSP

Software Implementation of 802.11 a blocks on Sandblaster DSP
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V Ramadurai, S Jinturkar, S Agarwal , of Software Defined , 2006 ,glossner.org
ABSTRACT In this paper, we describe the design and implementation of software blocks for
802.11 a receiver on Sandblaster DSP. A software solution provides high reusability, low
cost and short development time when compared to dedicated hardware solutions. A 

Development of DSP-based electromechanical (E/M) impedance analyzer for active structural health monitoring
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B Xu ,SPIE’s 13th International Symposium on Smart , 2006 ,me.sc.edu
ABSTRACT The electromechanical (E/M) impedance method is a powerful technique in
active structural health monitoring (SHM). E/M impedance method utilizes as its main
apparatus an impedance analyzer that reads the in-situ E/M impedance of piezoelectric 

Effect of rounding and saturation in fixed-point DSP implementation of IFFT and FFT for OFDM applications
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HA Suraweera , (GSPx 2004) Santa , 2004 ,ctie.monash.edu.au
FFTs for Orthogonal Frequency Division Multiplex (OFDM) transmitters and receivers. Using
the new technique, signals within the FFT structure are scaled so that there is an optimum
trade-off between saturation and rounding. Conventional FFT designs avoid saturation, 

A virtual DSP architecture for MPEG-4 Structured Audio
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G Zoia ,Proceedings of the COST-G6 Conference on Digital , 2000 ,nic.funet.fi
ABSTRACT The MPEG-4 Audio standard provides a toolset for synthetic Audio generation
and Audio processing called Structured Audio (SA). SA permits to describe algorithms
through its Structured Audio Orchestra Language (SAOL) programming language. Unlike 


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