digital signal processing-dsp-43



DSP-based digital controller for multi-phase synchronous buck converters
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JH Kim, JG Lim, SK Chung ,Journal of Power Electronics, 2009 ,review.jpe.or.kr
ABSTRACT This paper represents a design and implementation of a digital controller for a
multi-phase synchronous buck converter (SBC) using a digital signal processor (DSP). The
multi-phase SBC has generally been used for a voltage regulation module (VRM) of a 

An Economical Rapid Control Prototyping System Design with Matlab/Simulink and TMS320F2812 DSP
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XM Chen, XL Gong, HX Zhou, ZB Xu ,Proceedings of the , 2010 ,iaeng.org
Abstract—Rapid control prototyping (RCP) is now the typical method used by engineers to
develop and test their control strategies, but the commercial RCP systems are too expansive
for researchers to use. This paper presents an economical RCP (eRCP) system based on 

Kronos-a vectorizing compiler for music dsp
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V Norilo ,Proc. of the 12th Int. Conference on , 2009 ,kronos.vesanorilo.com
ABSTRACT This paper introduces Kronos, a vectorizing Just in Time compiler designed for
musical programming systems. Its purpose is to translate abstract mathematical expressions
into high performance computer code. Musical programming system design criteria are 

Efficient implementation of elliptic curve cryptography on dsp for underwater sensor networks
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H Yan, Z Shi , of Workshop on Optimizations for DSP and , 2009 ,engr.uconn.edu
Abstract—As emerging sensor networks are normally deployed in the field and thus
vulnerable to many types of attacks, it is critical to implement cryptographic algorithms in
sensor nodes to provide security services. Public-key algorithms, such as RSA and Elliptic 

Optimization of FIR filter implementation for FMT on VLIW DSP
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P Sysel ,Proceedings of the 4th International Conference on , 2010 ,wseas.us
Abstract—The paper summarizes the FMT modulation prototype filter design and its efficient
implementation on DSP. The optimum design of algorithms for digital signal processors with
VLIW architecture is described. Using this new approach it was, for example, possible to 

Speed Control of BLDC Motor Using DSP
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G MadhusudhanaRao, BV SankerRam ,International Journal of , 2010 ,ijest.info
Abstract This paper proposed the speed control of brushless dc motor drive employing PWM
technique using TMS320F240 digital signal processor. BLDC is widely used because of its
high mechanical power density, simplicity and cost effectiveness. The complete controller 

DSP-FPGA based real-time power quality disturbances classifier
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Z Ming, L Kaicheng ,Metrol. Meas. Syst, 2010 ,metrology.pg.gda.pl
Abstract This paper describes a real-time classification method of power quality (PQ)
disturbances based on DSP-FPGA. The proposed method simultaneously uses the results
obtained in the application of a series of RMS values and the discrete Fourier transform to 

A comparison between DSP and FPGA platforms for real-time imaging applications
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M Shirvaikar ,Proceedings of SPIE-IS and T , 2009 ,144.206.159.178
ABSTRACT Real-time applications impose serious demands on hardware size, time
deadlines, power dissipation, and cost of the solution. A typical system may also require
modification of parameters during operation. Digital Signal Processors (DSPs) are a 

DSP based series-parallel connected two full-bridge dc-dc converter with interleaving output current sharing
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D Sha, Z Guo ,Journal of Power Electronics, 2010 ,review.jpe.or.kr
Abstract Input-series-output-parallel (ISOP) connected DC-DC converters enable low
voltage rating switches to be used in high voltage input applications. In this paper, a DSP is
adopted to generate digital phase-shifted PWM signals and to fulfill the closed-loop 

Digital Audio Effect System-on-a-Chip Based on Embedded DSP Core
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K Byun, YS Kwon, S Park ,ETRI journal, 2009 ,etrij.etri.re.kr
This paper describes the implementation of a digital audio effect system-on-a-chip (SoC),
which integrates an embedded digital signal processor (DSP) core, audio codec intellectual
property, a number of peripheral blocks, and various audio effect algorithms. The audio 

Speckle interferometry using a CMOS-DSP camera for static and dynamic deformation measurements
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MV Aguanno, F Lakestani, MP Whelan ,ICEM12 12th , 2004 ,ocrg.ul.ie
ABSTRACT In this paper the application of Speckle interferometry using a CMOS-DSP
camera for both static and dynamic measurements is considered. The use of this camera
offers a number of advantages over the traditional CCD based systems. These are in 

A Multichannel Data Acquisition and Analysis System based on off-the-shelf DSP Boards
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A Folkers ,Proc ECMCS, 2001 ,isip.uni-luebeck.de
Abstract—The EU-funded project VSAMUEL aims to develop a versatile system for
advanced neuronal recordings with multisite microelectrodes. Within this project we are
developing a data acquisition system for high channel counts. The system will be able to 

High Performance DoD DSP Applications
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R Bond ,2003 Workshop on Streaming Systems, http://catfish. , 2003 ,groups.csail.mit.edu
Page 1. Slide-1 SC2002 Tutorial MIT Lincoln Laboratory High Performance DoD DSP Applications
Robert Bond  Slide-2 SC2002 Tutorial Outline • DoD High-Performance DSP Applications •
Middleware (with some streaming constructs) • Future Directions • Summary Page 3. 

A 167-processor computational array for highly-efficient DSP and embedded application processing
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D Truong, W Cheng, T Mohsenin, Z Yu ,HotChips Symp. High- , 2008 ,hotchips.org
Page 1. A 167-processor Computational Array for Highly-Efficient DSP and Embedded Application
Processing Dean Truong, Wayne Cheng, Tinoosh Mohsenin, Zhiyi Yu,  simple fine-grained cores –
Small local memories sufficient for DSP kernels – Globally Asynchronous and 

A Simulation Tool for Introducing Algebraic CELP (ACELP) Coding Concepts in a DSP Course
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V Atti ,IEEE 2002 DSP Workshop, 2002 ,jdsp.engineering.asu.edu
ABSTRACT This paper presents an educational tool1 for introducing Code Excited Linear
Prediction (CELP) coding concepts in senior undergraduate and graduate DSP-related
courses. The tool consists of a user-friendly graphical interface along with a complete 

A delay-insensitive FIR filter for DSP applications
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W Kuang, JS Yuan, RF DeMara ,Proc. Ninth An. NASA , 2000 ,cal.ucf.edu
Abstract: This paper explores delay-insensitive design techniques for digital signal
processing applications. Direct and interleaved FIR filter architectures using this technique
are designed. Synopsys simulation shows the interleaved FIR filter is better than direct 


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