microprocessor research papers 13

 DDD-FM9001: Derivation of a Verified Microprocessor
free download

B Bose ,1994 ,cs.indiana.edu
Abstract Derivation and verification represent alternate approaches to design. Derivation
aims at deriving a correct by construction” design while verification aims at constructing a
post factum proof of correctness” for a design. However, as researchers and engineers 

 A microarchitectural analysis of soft error propagation in a production-level embeddedmicroprocessor
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J Blome, S Mahlke, D Bradley ,In Proceedings of the , 2005 ,cccp.eecs.umich.edu
ABSTRACT Current trends in device scaling continue to cause an increasing risk of transient
faults in microprocessors due to high energy strikes from radiated particles. In this work, we
present a thorough microarchitectural analysis of the effects of soft errors on a production- 

 SH4 RISC microprocessor for multimedia
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MAJC-5200: a high performance microprocessor for multimedia computing
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S Sudharsanan ,Parallel and Distributed Processing, 2000 ,Springer
The newly introduced Microprocessor Architecture for Java Computing (MAJC) supports
parallelism in a hierarchy of levels: multiprocessors on chip, vertical micro threading,
instruction level parallelism via a very long instruction word architecture (VLIW) and SIMD. 

 Architectural innovations in the CRISP microprocessor
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AD Berenbaum, DR Ditzel ,CompCon’87 , 1987 ,netlib.bell-labs.com
The AT&T CRISP Microprocessor is a high performance general purpose 32-bit processor. It
is a single CMOS chip containing 172,163 transistors. The instruction-set architecture is a
registerless 2½ address memory-to-memory machine with a small number of instructions 

 Implementing a functional/timing partitioned microprocessor simulator with an FPGA
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N Dave, M Pellauer ,Wkshp. on Architecture , 2006 ,people.csail.mit.edu
When creating a microarchitectural simulator, one desires three things: confidence in
correctness, speed of design, and speed of simulation. The first requirement is necessary for
accurate experimentation. The second impacts the architect’s ability to perform 

 FR 500 VLIW-architecture high-performance embedded microprocessor
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T Sukemura ,Fujitsu Scientific and Technical Journal, 2000
A new-concept FR500 microprocessor using the VLIW architecture has been developed for
digital consumer products. It can issue four instructions simultaneously and can be
configured in a small-scale circuit, making it possible to implement a low-cost, high- 

 A fast, efficient synchronous-buck controller for microprocessor power supplies
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D Briggs, R Martinez ,Proc. of High , 1998 ,zanran_storage.s3.amazonaws.com
ABSTRACT A new fast and efficient buck-controller for microprocessor power supplies has
been developed and tested under anticipated Intel workstation/server/desktop next-
generation microprocessor operating conditions. The operating conditions include 12V 

Microprocessor control of a ventricular volume servo-pump
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K Sunagawa, KO Lim, D Burkhoff ,Annals of Biomedical , 1982 ,Springer
Abstract Measurement of the instantaneous pressure-volume relationship of the left ventricle
is fundamental to the study of ventricular mechanics. In order to effectively investigate this
relationship, it is necessary to vary and control the time course of ventricular volume 

Multicontext dynamic reconfiguration and real-time probing on a novel mixed signal programmable device with on-chip microprocessor
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In this paper we present a novel RAM-based field programmable mixed-signal integrated
device consisting of a large granularity Field Programmable Gate Array (FPGA), a set of
programmable and interconnectable analog cells, and a microprocessor core. Two 

 A microprocessor-based digital feeder monitor with high-impedance fault detection
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R Patterson, W Tyska , for Protective Relay , 1994 ,store.gedigitalenergy.com
The high impedance fault detection technology developed at Texas A&M University after
more than a decade of research, funded in large part by the Electric Power Research
Institute, has been incorporated into a comprehensive monitoring device f or overhead 

 Aluminum silicon carbide (AlSiC) microprocessor lids and heat sinks for integrated thermal management solutions
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MA Occhionero, RA Hay, RW Adams ,PROCEEDINGS-SPIE , 2000 ,alsic.com
Abstract The next generation microprocessor assemblies will require integrated thermal
management design solutions as the device density and clock speeds increase. These
solutions will include a heat spreader, or lid, that is in contact with the heat generating 

 Future trend of microprocessor design
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R Yung, S Rusu ,Invited paper, In Proceeding of 28th , 2002
In the past thirty years, computer technology advances have fundamentally changed the
practice of business and personal computing. During these three decades, the wide
acceptance of personal computers and the explosive growth in the performance, 

An enhanced framework for microprocessor test-program generation
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  Genetic Programming, 2003 ,Springer
Test programs are fragment of code, but, unlike ordinary application programs, they are not
intended to solve a problem, nor to calculate a function. Instead, they are supposed to give
information about the machine that actually executes them. Today, the need for effective 

Increasing microprocessor performance with tightly-coupled reconfigurable logic arrays
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S Sawitzki, A Gratz , Logic and Applications From FPGAs to , 1998 ,Springer
Conventional approaches to increase the performance of microprocessors often do not
provide the performance boost one has hoped for due to diminishing returns. We propose
the extension of a conventional hardwired microprocessor with a reconfigurable logic 

 The influence of microprocessor instructions on the energy consumption of wireless sensor networks
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  ,Third Workshop on Embedded , 2006 ,sensorlab.cs.dartmouth.edu
Abstract—The field of low power compilation could be applied to sensor networks to yield
significant savings for the sensing, computation, and communications processes in sensor
networks. Such savings could come via simple low power savings flags for future 

 Dependency and exception handling in an asynchronous microprocessor
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DA Gilbert ,1997 ,
Abstract Dependency and exception handling mechanisms are an important part of modern
high-performance microprocessors. In a pipelined microprocessor, dependency and
exception handling require different stages of the pipeline to interact with each other to 

 Reliability of microprocessor-based relay protection devices: Myths and reality
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 Serbian Journal of Electrical Engineering, 2009 ,scindeks-clanci.nb.rs
The article examines four basic theses about the ostensibly extremely high reliability of
microprocessor-based relay protection (MP) touted by supporters of MP. Through detailed
analysis based on many references it is shown that the basis of these theses are 

 Multivariate Po wer/Performance Analysis For High Performance Mobile MicroprocessorDesign
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GZN Cai, K Chow+, T Nakanishi ,Power Driven , 1998 ,eecs.umich.edu
1 Abstract The power consumption becomes one of the important architectural and design
issues besides the primary goal of performance on high performance microprocessors. With
increasing high clock frequency and design complexity on high performance mobile 

 Comparing and contrasting FPGA and microprocessor system design and development
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K Parnell ,White Paper, XILINX Corporation, 2004 ,direct.xilinx.com
Xilinx invented Field Programmable Gate Arrays (FPGAs), holds multiple patents, and is the
clear market leader in programmable logic in terms of both revenue and technology. Xilinx
was the first programmable logic company to exceed one billion dollars in FY2000 and 

A simple microprocessor Mossbauer spectrometer
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MA Player ,Journal of Physics E: Scientific , 1978 ,iopscience.iop.org
Page 1. A simple microprocessor Mossbauer spectrometer This article has been downloaded
from IOPscience. Please scroll down to see the full text article. 1978 J. Phys.  E: Sci. Instrum., Vol.
11, 1978. Printed in Great Britain A simple microprocessor Mossbauer spectrometer 

 A Microprocessor Controlled Twist Drill Grinder for Automated Drill Production
free download

MA Fugelso ,Trans. ASME, J. of Eng. for Ind, 1979 ,wumrc.engin.umich.edu
The presently available twist drill grinding machines evolved over a long period of time.
They are a product of engineering ingenuity through trial and error. A recently developed
mathematical model of twist drill geometry has made it possible to design rationally and to 

 Microprocessor design
free download

GW McFarland ,2006 ,ulb.tu-darmstadt.de
Page 1. Microprocessor Design A Practical Guide from Design Planning to Manufacturing
Grant McFarland  Page 2. Brief Contents Chapter 1. The Evolution of the Microprocessor 1
Chapter 2. Computer Components 37 Chapter 3. Design Planning 71 

 Energy-aware microprocessor synchronization: Transactional memory vs. locks
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T Moreshet, RI Bahar ,Fourth Annual Boston-Area , 2006 ,ele.uri.edu
Abstract Uniprocessor studies have shown that wrong-path memory references pollute the
caches by bringing in data that are not needed for the correct execution path and by evicting
useful data or instructions. Additionally, they also increase the amount of cache and 

 Review Microprocessor of microRNAs: regulation and potential for therapeutic intervention
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KJ Beezhold, V Castranova ,2010
Abstract MicroRNAs (miRNAs) are a class of small, noncoding RNAs critically involved in a
wide spectrum of normal and pathological processes of cells or tissues by fine-tuning the
signals important for stem cell development, cell differentiation, cell cycle regulation, 

 RI0000 Superscalar Microprocessor
free download

A Ahi, Y Chen, R Conrad, R Martin ,1995
System Interface Bus• 3 arbitration signals• 2 flow control signals• 12-bit command bus with
parity• 64-bit muxed adrs/data bus with 8-bit ECC• 3-bit processor state response bus with
parity• 5-bit external response bus with parity• Clock Dividers 1, 1.5, 2, 2.5, 3, 3.5, 4 

On-line Testing of an Off-the-shelf Microprocessor Board for Safety-critical Applications
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 M Damiani, L Impagliazzo , Computing—EDCC-2, 1996 ,Springer
The paper describes the strategy adopted to implement on-line test procedures for a
commercial microprocessor board used in an automated light-metro control system. Special
care has been devoted to chose the most effective test strategy for memory elements,