fpga-field programmable gate arrays-research papers-2012 section 4

fpga-field programmable gate arrays-research papers-2012 section 4




Hardware Implementation of Multimedia Encryption Techniques Using FPGA
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ABSTRACT Multimedia encryption algorithm has gain importance nowadays for copyright protection. Many multimedia encryption Techniques had been designed and tested software base. We will implement a library of hardware realization using FPGA of seven multimedia

32-Bit NxN Matrix Multiplication: Performance Evaluation for Altera FPGA, i5 Clarkdale and Atom Pineview-D Intel General Purpose Processors
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Abstract Nowadays mobile devices represent a significant portion of the market for embedded systems, and are continuously demanded in daily life. From the end-user perspective size, weight, features are the key quality criteria. These benchmarks criteria

A real-time FPGA-based implementation of a high-performance MIMO-OFDM mobile WiMAX transmitter
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The Multiple Input Multiple Output (MIMO)-Orthogonal Frequency Division Multiplexing (OFDM) is considered a key technology in modern wireless-access communication systems. The IEEE 802.16 e standard, also denoted as mobile WiMAX, utilizes the MIMO-OFDM

FPGA-based real-time implementation of detection algorithm for automatic traffic surveillance sensor network
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ABSTRACT This paper describes the FPGA-based hardware implementation of an algorithm for an automatic traffic surveillance sensor network. The aim of the algorithm is to extract moving vehicles from real-time camera images for the evaluation of traffic parameters,

Embedding InstrumentsModules into an IEEE1451-FPGA-based Weblab Infrastructure
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ABSTRACT Adopting standard-based weblab infrastructures can be an added value for spreading their influence and acceptance in education. This paper suggests a solution based on the IEEE1451. 0 Std. and FPGA technology for creating reconfigurable weblab

FPGA Implementation of Direct Digital Synthesizer using Pipelined Cordic Algorithm
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ABSTRACT This paper proposes Design and Implementation of CORDIC algorithm for Direct Digital Synthesizer. COordinate Rotation DIgital Computer (CORDIC) algorithm is an interesting technique for phase to sine amplitude conversion. The algorithm proposed in

FPGA compression of ECG signals by using modified convolution scheme of the Discrete Wavelet Transform
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ABSTRACT This paper presents FPGA design of ECG compression by using the Discrete Wavelet Transform (DWT) and one lossless encoding method. Unlike the classical works based on off-line mode, the current work allows the real-time processing of the ECG signal

Spartan-3A FPGA Implementation
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ABSTRACT This paper presents Spartan-3A devices; including, XC5S50A (package: tq144, speed grade:-5), XC3S200A (package: ft256, speed grade:-5), XC3S400A (package: Fg400, speed grade:-5), XC3S700A (package: fg484, speed grade:-5) field programmable gate

Real-time FPGA-based Non-Cryptography System for Wireless Network
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ABSTRACT Traditional privacy techniques for wireless communications are facing great challenges, due to the open radio propagation environment and limited options of transmission techniques. A new bilateral pilot aided protocol is presented, with single-tone

Survey on FPGA Routing Techniques
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ABSTRACT Field Programmable Gate Array (FPGA), a programmable integrated circuit, has gained great popularity in the circuit design. Routing is an important part of FPGA design step which determines the routing in horizontal and vertical channels of FPGA. In this

FPGA 181
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 65 Yonos Allahyari and Hadi Sadoghi-Yazdi Performance Evaluation of Different Averaging based Filter Designs Using Digital Signal Processor and its Synthesis on FPGA 75 Implementation of Multiplierless Ramanujan Ordered Number DCT on FPGA 181

Differential power analysis: a serious threat for FPGA security
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Although cryptosystem designers frequently assume that secret parameters will be manipulated in closed reliable computing environments, Kocher et al. reported in 1998 that microchips leak information correlated with the data handled and introduced a new kind of

Digital very-large-scale integration (VLSI) Hopfield neural network implementation on field programmable gate arrays (FPGA) for solving constraint satisfaction
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This paper discusses the implementation of Hopfield neural networks for solving constraint satisfaction problems using field programmable gate arrays (FPGAs). It discusses techniques for formulating such problems as discrete neural networks, and then it

FINGERPRINT MINUTIAE EXTRACTION ALGORITHM BASED-ON CROSSING NUMBER METHOD FOR HARDWARE IMPLEMENTATION USING FPGA 
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ABSTRACT In this article, a main perspective of developing and implementing fingerprint extraction and matching algorithms as a part of fingerprint recognition system is focused. First, developing a simple algorithm to extract fingerprint features and test this algorithm

Highly Expandable Reconfigurable Platform using Multi-FPGA based Boards
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ABSTRACT Reconfigurable computing has become an essential part of research since last few decades. By placing computationally intensive applications in the reconfigurable logic area of the system, the remarkable performance gains have been found. Among the

FPGA Synthesis of Fuzzy (PD and PID) Controller for Insulin Pumps in Diabetes Using Cadence
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ABSTRACT This paper emphasizes on a FPGA synthesis of Fuzzy PD and PID Controller in biomedical application. We aim at identifying a proper methodology for the infusion process of insulin to diabetic patients using an automated fuzzy logic PD and PID controller. A

FPGA NES
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ABSTRACT The goal of this project is to design a stand-alone emulator of the Nintendo Entertainment System video gaming platform whose major architecture is based primarily around a modern programmable logic device in conjunction with additional external

A Novel Approach to Improve Security of FPGA Based IP Core at Physical Layout Level
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ABSTRACT The use of pre-designed hardware modules, also called Intellectual Property (IP) cores is an important part of the effort to design and implement complex systems. Creators and owners of IP designs want assurance that their content will not be illegally

FPGA Implementation of Low Power Hardware Efficient Flagged Binary Coded Decimal Adder
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ABSTRACT This paper presents a novel architecture for hardware efficient binary represented decimal addition. We extend the two operand ripple carry addition by one with the third input being constant. The addition technique is made fast by generating flag bits

FERMAT NUMBER TRANSFORM SYSTEM IMPLEMENTATION USING PARALLEL ARCHITECTURE WITH FPGA TECHNOLOGY
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ABSTRACT This paper described for computing the generalized cyclic convolution is also applied for the linear convolution by the modified Fermat number transform (FNT) number system. The Code conversion method and butterfly operation are proposed to perform

An FPGA-based module for multiphoton coincidence counting
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ABSTRACT We present a multi-channel coincidence-counting module for use in quantum optics experiments. The circuit takes up to four TTL pulse inputs and counts either 2-, 3-, or 4- fold coincidences, within a user-selected coincidence time window as short as 12 ns. The

Watermarking FPGA Bitfile for Intellectual Property Protection
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ABSTRACT. Intellectual property protection (IPP) of hardware designs is the most important requirement for many Field Programmable Gate Array (FPGA) intellectual property (IP) vendors. Digital watermarking has become an innovative technology for IPP in recent

FPGA IMPLEMENTATION OF POINT PROCESSES USING XILINX SYSTEM GENERATOR
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ABSTRACT Application areas of signal processing have grown dramatically in importance in recent times, in parallel with the growth of powerful and low-cost processing chips. This has led, in turn, to many new applications, including multimedia delivery and hand-held

Hardware Description of Multi-Directional Fast Sobel Edge Detection Processor by VHDL for Implementing on FPGA
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ABSTRACT The VHDL is an appropriate Hardware Description Language (HDL) for providing hardware models of practical image processing algorithms. The aim of this paper is to present hardware architecture of Sobel edge detection algorithm for implementing on

A DECADE OF PRODUCTIVE FPGA UTILIZATION WITH GENETIC ALGORITHMS
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ABSTRACT Genetic algorithms are one of the best ways to deal with the optimization problems. They are precisely suitable for mixed combinatorial problems. As genetic algorithms find the solution by producing more number of population generations based

A Framework of an Internet Firewall for IPv6 using FPGA
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ABSTRACT As the communication via internet is growing very fast, network security becoming the essential need of an organization or user. it include protecting data from unauthorized access, protecting data from damage and implementing policies and

Closing the Gap between FPGA and ASIC: Balancing Flexibility and Efficiency
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ABSTRACT Despite many advantages of Field-Programmable Gate Arrays (FPGAs), they fail to take over the IC design market from Application-Specific Integrated Circuits (ASICs) for high- volume and even medium-volume applications, as FPGAs come with significant cost in

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