ENGINEERING RESEARCH PAPERS

soc-system on chip IEEE PAPER 2016




REVIEW REPORT ON SOC ON VARIOUS PLATFORMS FOR VEHICLES
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Abstract-Due to the rise in development of semiconductor technology it is possible to design the complete system on a single chip, which is called as ''System on chip. In this paper the designing of the proposed system will be done which controls the various functions in the

A Low-Power High-Performance SoC Platform for IoT Applications
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Abstract-The rapid growth of wirelessly connected devices introduces a diverse range of applications and requires intelligent hardware platforms that integrate computing, sensing, and wireless connectivity in a compact system-on-chip (SoC). This paper presents a low-

A Mixed SOC Estimation Algorithm with High Accuracy in Various Driving Patterns of EVs
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Abstract In this paper, a mixed algorithm is proposed to overcome the limitations of the conventional algorithms, which cannot be applied in various driving patterns of drivers. The proposed algorithm based on the coulomb counting method is mixed with reset algorithms

A Novel Approach to Formal Verification for AMS SoC
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Abstract. This paper proposes a novel methodology for AMS SoC formal verification based on Hybrid Scheme combined with symbolic computing and LHPN model, FV-HS. The paper is concerned with a class of AMS designs, continuous-time AMS designs ie, tunnel diode

SFV: A Scalable Approach to Formal Verification for AMS SoC
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Abstract This paper proposes a new scalable approach to formal verification (SFV) for AMS SoC designs. Induction rules defined in computer symbolic algebra system Maple are followed to extract representation of property of AMS SoC, constraints solving is performed

FROM FPGA TO ASIC IMPLEMENTATION OF AN OPENRISC BASED SOC FOR VOIP APPLICATION
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ABSTRACT ASIC (Application Specific Integrated Circuit) design verification takes as long as the designers take to describe, synthesis and implement the design. The hybrid approach, where the design is first prototyped on an FPGA (Field-Programmable Gate

An Accelerating Solution for N-body MOND Simulation with FPGA-SOC
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Abstract:As a modified-gravity proposal to handle the dark matter problem on galactic scales, modified Newtonian dynamics (MOND) has shown a great success. However, the N- body MOND simulation is quite challenged by its computation complexity, which appeals

QSoC: Implementation of a simple Queue SoC on FPGA
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Output DU_O_PN Produced number QCU DU_O_CN Consumed number QCU DU_O_RegSel Select SPR QCU DU_O_RegNum Select SPR address QCU DU_O_Operand Offset or immediate value QCU DU_O_ControlExe Execution unit control

Design Approach to Realise SoC to Generate Time Stamping Signal from Satellites and Updating on Ethernet for Synchronization
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371 Design Approach to Realise SoC to Generate In the absence of signals from the GPS satellites, the time updation process continues with a local clock source built with in the SoC. Keywords: SoC, FPGA, GPS, NTP, IRIGB, Ethernet, TGL, PTP, IP Core, Acquisition, Tracking.

SOC 243: Sociology of Sexualities
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This course uses a sociological lens to explore how sexuality is socially constructed, policed, expressed, and suppressed, with particular attention to how sexuality intersects with race, gender, and class. Sexual identities gay, straight, bisexual, or queer and sexual

THE ROYAL l1^ Phil. Trans. R. Soc. (2012) 367, 374-384 SOCIETY JlJ doi: 10.1098/rstb. 20 11.0188
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Genome-scale scans have revealed highly heterogeneous levels of divergence between closely related taxa in many systems. Generally, a small number of regions show high differentiation, with the rest of the genome showing no or only low levels of divergence.

SOC 2xx: Sexual Identity Society: LGBTQ Perspectives
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This course uses a social justice activist lens to explore lesbian, gay, bisexual, trans*, and queer (LGBTQ) identities and social movements. It will examine how LGBTQ sexuality and identity are shaped by history, culture, and other social forces. Readings introduce key

THE ROYAL «Phil. Trans. R. Soc. (2012) 367, 670-679 SOCIETY doi: 10.1098/rstb. 20 11.0301
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The social science literature contains numerous examples of human tribalism and parochialism-the tendency to categorize individuals on the basis of their group membership, and treat ingroup members benevolently and outgroup members malevolently. We

THE ROYAlR Phil. Trans. R. Soc. (2012) 367, 59-74 SOCIETY 3l3 doi: 10.1098/rstb. 201 1.0147
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Various authors have suggested behavioural similarities between tool use in early hominins and chimpanzee nut cracking, where nut cracking might be interpreted as a precursor of more complex stone flaking. In this paper, we bring together and review two separate

Transforming Mixed-Signal Circuits Class through SoC FPAA IC, PCB, and Toolset
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Abstract:We present a SoC large-scale Field Programmable Analog Array (FPAA) test system, enabled by configurable analog–digital ICs to create a simple interface for a wide range of experiments in classroom environments. This configurable system appears as a

PERFORMANCE ANALYSIS OF NoC ROUTING ALGORITHMS FOR 5× 5 MESH BASED SoC
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Abstract Over the years, semiconductor industry has undergone a rapid evolution which urges the SoCs to become communicationcentric. For efficient on-chip communication, high performance routers are used. System on chip is an adaptable building design for the

High-Level HW-SW Co-design of an 802.11 a Transceiver System using Zynq SoC
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Conclusions For direct feedthrough algorithms, moving more components to execution in HW results in faster execution speed, but adds risk of overwhelming FPGA resources While energy consumption increases as more components are placed on PL, the amount is

Foveal vision mapping and multiscale segmentation within an AP SoC
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Abstract:Many embedded systems need image processing applications that, fulfilling real- time performance, will also address restrictions of size, weight or power consumption. Furthermore, applications such as tracking or pattern recognition do not necessarily

THETOYAL PhiL Tmns-R-Soc-B (2012) 367, 850-859 SOCIETY doi: 10.1098/rstb. 201 1.0316
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Tuberculosis () is a disease of antiquity. Yet today still causes more adult deaths than any other single infectious disease. Recent studies show that contrary to the common view postulating an animal origin for , Mycobacterium tuberculosis complex (MTBC), the

THE ROYAL 1^ Phil. Tvans. R. Soc. (2012) 367, 422-429 SOCIETY JLJ doi: 10.1098/rstb. 20 11.0250
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Chromosomal inversions impact genetic variation and facilitate speciation in part by reducing recombination in heterokaryotypes. We generated multiple whole-genome shotgun sequences of the parapatric species pair Drosophila pseudoobscura and Drosophila

A Control Method for Balancing the SoC of Distributed Batteries in Islanded Converter-interfaced Microgrids
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Abstract-In a low-voltage islanded microgrid powered by renewable energy sources, the energy storage systems (ESSs) are considered necessary, in order to maintain the power balance. Since a microgrid can be composed by several distributed ESSs (DESSs), a

Current SoC Architectures
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DASH source code is available at GitHub https://github.com/CMU-SAFARI/HWASim Page 2. Current SoC Architectures Heterogeneous agents: CPUs and HWAs HWA : Hardware Accelerator Main memory is shared by CPUs and HWAs Interference 2

HW/SW Co-design and Implementation of a Fountain Code for an FPGA System-on-Chip
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Abstract Wireless communication traffic has increased significantly over the past few decades. Communication via noisy and unreliable channel can lead to data loss or erroneous data information. This problem can be resolved using a back channel that

OPTIMIZATION OF SCAN TIME OF SCAN TEST IN SYSTEM-ON-CHIP
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Abstract: We present an SoC testing approach that integrates test data compression, T AM/test wrapper design, and test scheduling. An improved LFSR reseeding technique is used as the compression engine. All cores on the SoC share a single on-chip LFSR. At

Qualitative Techniques for System-on-Chip Test with Low-Energy Protons
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Abstract:This paper presents an intended test setup and methodology for testing micro- controller SoCs against the effects of ionizing radiations. The method structure is based on a modular test sequence for test definition, coding, validation and setup. It will be illustrated

REGISTER-TRANSFER LEVEL POWER ESTIMATION AND REDUCTION METHODOLOGIES OF DIGITAL SYSTEM-ON-CHIP BUILDING BLOCKS
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ABSTRACT This thesis is a study of register-transfer level power estimation and reduction methodologies for digital system-on-chip building blocks. In the theory section, the components of power dissipation for current circuit technology are explained in details, the

Design of Car Reversing System Based on Single Chip Microcomputer
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Abstract This paper introduces a kind of based on microcontroller pulse reflecting type ultrasonic ranging measuring alarm system. This design mainly AT89S51 microcontroller core, using ultrasonic sensors for the features and advantages of the ultrasonic ranging