System-on-Chip Test-time and Scan-power Minimization Integrating Core and Interconnect Testing
FREE-DOWNLOADG Das, S Chattopadhyay IJCSNS International Journal of Computer Science and Network Security, VOL.9 No.3, March 2009 . This paper presents a Genetic Algorithm (GA) based
Embedded magnetics for power system on chip PSoC-thesis
FREE-DOWNLOAD J Lu – 2009 – etd.fcla.edu
Embedded magnetics for power system on chip PSoC-thesis
FREE-DOWNLOAD J Lu – 2009 – etd.fcla.edu