Yield enhancement of programmable ASIC arrays by reconfiguration of circuit placements
FREE-DOWNLOADJ Narasimham, K Nakajima, CS Rim… – … -Aided Design of …, Abstract- In an approach recently proposed for the yield enhancement of programmable gate arrays (PGA’s), an initial placement of a circuit is first obtained using a standard technique such as simulated annealing on a defect-free PGA. In the next step, this placement is .
Receiver ASIC for timing, trigger and control distribution in LHC experiments
FREE-DOWNLOADA Sancho – Nuclear Science, research Transactions on, An ASIC receiver has been developed for the optical timing, trigger and control distribution system for LHC detectors. It is capable of recovering the LHC reference clock and the first-level trigger decisions and making them available to the front-end electronics properly deskewed in
Receiver ASIC for timing, trigger and control distribution in LHC experiments
Receiver ASIC for timing, trigger and control distribution in LHC experiments