Layout Challenges
Addressing the Layout Challenges of Increasing Analog Content in SoCs FREE-DOWNLOAD [PDF] E Koeroghlian… – Mentor Graphics Deep Submicron …, 2003 The growing complexity and functionality of SoC designs is increasing the quantity of analog blocks on SoC chips. End user applications, including video cell phones, MP3 music devices and more complex wire- less devices such as web browsers […]
voltage-dependent variation
Layout design to minimize voltage-dependent variation on input capacitance of an analog ESD protection circuit FREE-DOWNLOAD [PDF] MD Ker… – Journal of electrostatics, 2002 A design model to find the optimized device dimensions and layout spacings on the input ESD clamp devices is developed in this work to keep the total input capacitance almost constant, even if the analog […]
multi-antenna transmission
Secure wireless network connectivity with multi-antenna transmission FREE-DOWNLOAD [PDF] X Zhou, R Ganti… – Wireless Communications, research …, 2011 Abstract—Information-theoretic security constraints reduce the connectivity of wireless networks in the presence of eaves- droppers, which motivates better modeling of such networks and the development of techniques that are robust to eavesdropping. In this letter, we are