MOSFET METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS


MOSFET power losses calculation using the data-sheet parameters
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The aim of this Application Note is to provide a mathematical tool for the calculation of power losses in MOSFET -based power electronics converters used in automotive applications. After a general discussion on power losses calculation using the data-sheet parameters, the

Power MOSFET basics
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Discrete power MOSFETs employ semiconductor processing techniques that are similar to those of todays VLSI circuits, although the device geometry, voltage and current levels are significantly different from the design used in VLSI devices. The metal oxide semiconductor

A folded-channel MOSFET for deep-sub-tenth micron era
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Deep-sub-tenth micron MOSFETS with gate length down to 20 nm are reported. To improve the short channel effect immunities, a novel Folded Channel Transistor structure is proposed. The quasi-planar nature of this n~ ewvariant of the vertical double-gate SOI

IGBT or MOSFET : choose wisely
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The bipolar transistor was the only real power transistor until the MOSFET came along in the 1970s. The bipolar transistor requires a high base current to turn on, has relatively slow turn-off characteristics (known as current tail), and is liable for thermal runaway due to a

Design and application guide for high speed MOSFET gate drive circuits
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The main purpose of this paper is to demonstrate a systematic approach to design high performance gate drive circuits for high speed switching applications. It is an informative collection of topics offering a one-stop-shopping to solve the most common design

Bsim4. 6.0 mosfet model
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BSIM4, as the extension of BSIM3 model, addresses the MOSFET physical effects into sub- 100nm regime. The continuous scaling of minimum feature size brought challenges to compact modeling in two ways: One is that to push the barriers in making transistors with

The EPFL-EKV MOSFET model equations for simulation
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The EPFL-EKV MOSFET model is a scalable and compact simulation model built on fundamental physical properties of the MOS structure. This model is dedicated to the design and simulation of low-voltage, low-current analog, and mixed analog-digital circuits using

MOSFET /IGBT drivers theory and applications
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MOSFET and IGBT Technology. 1.2. MOSFET

Introduction to PSP MOSFET model
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ABSTRACT PSP is the latest and the most advanced compact MOSFET model developed by merging the best features of the two surface potential-based models: SP (developed at The Pennsylvania State University) and MM11 (developed by Philips Research). This work

Matching MOSFET drivers to MOSFETs
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There are many MOSFET technologies and silicon processes in existence today, with new advances being made every day. To make a generalized statement about matching a MOSFET driver to a MOSFET based on voltage/current ratings or die sizes is very difficult, if

MOSFET failure modes in the zero-voltage-switched full-bridge switching mode power supply applications
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As the demand for the telecom/server power is growing exponentially, the need for higher power density increases each year. Increasing power density relies on less component counts, smaller reactive component size, and/or better system efficiency. Higher switching

A MOSFET electron mobility model of wide temperature range (77-400 K) for IC simulation
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Based on the physics of scattering mechanisms of MOSFET inversion layer carriers at different temperatures and vertical electric fields, a new unified mobility model of wide temperature (77 400 K) and Eeff range is proposed for IC simulation. Measurement data

Single-capacitor MOSFET -C integrator using OTRA
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A highly linear MOS operational transresistance amplifier (OTRA) integrator with reduced number of capacitors and MOSFET transistors IS proposed. Only one capacitor is required for an integrator to achieve cancellation of MOSFET nonhnearities. The proposed integrator

SiC MOSFET reliability update
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Article Preview Article Preview Article Preview Significant advancement has been made in the gate oxide reliability of SiC MOS devices to enable the commercial release of Crees Z- FET product. This paper discusses the key reliability results from Time-Dependent

The planar-doped-barrier-FET: MOSFET overcomes conventional limitations
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Experimental: In vertical grown MOSFETs MBE offers the possibility of well-defined channel doping on a nanometer scale. When delta-doping is used an intrinsic electric field-tailoring can be achieved due to the sharp variation of intrinsic potentials. This electric fieldtailoring

Conventional n-Channel MOSFET Devices Using Single Layer HfO~ 2 and ZrO~ 2 as High-k Gate Dielectrics with Polysilicon Gate Electrode
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Conventional self-aligned MOSFET transistors with poly-silicon gate-electrode were successfully fabricated using Hf-oxide and Zr-oxide as high-k gate-dielectrics. The gatestack consisting of poly-silicon on Hf-oxide exhibited promising transistor characteristics with a General introduction of this Chapter shows the evolution of the SOI MOS transistor and retraces the history of the multigate concept. The advantages of multigate FETs in terms of electrostatic integrity and short-channel control are described, and the challenges posed by

Scalable Gm/I based MOSFET model
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The continuing decrease of supply voltage to reduce power consumption of digital circuits strongly affects the design of the analog part of mixed analog/digital ICs. As a consequence, MOS transistors in analog circuits often operate in moderate inversion. Compact MOSFET

Bsim4. 3.0 mosfet model
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Understanding the effect of power MOSFET package parasitics on VRM circuit efficiency at frequencies above 1MHz
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The effect of frequency on the parasitic inductance and resistance of DPAK, D2PAK, MLP, SO-8 and the proprietary DirectFET TM power package are presented. Each package shows a characteristic increase in resistance with frequency in the range of 100KHz to 5MHz. The