MULTIPLEXER -VLSI PROJECT


A self-repairing multiplexer -based FPGA inspired by biological processes
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Special-purpose parallel systems, and in particular cellular SIMD (Single-Instruction Multiple- Data-Stream) and SPMD (Single-Program Multiple-Data-Stream) array processors are very interesting approaches for handling many computationally-intensive applications. These

Design of Reversible/Quantum Ternary Multiplexer and Demultiplexer.
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In this paper, we show realization of macrolevel ternary reversible 2-qudit Feynman gate, 3- qudit controlled Feynman gate, and 3-qudit Toffoli gates using ternary reversible 1-qudit gates and 2-qudit Muthukrishnan-Stroud gates, which are theoretically realizable using

The microwave SQUID multiplexer
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The Microwave SQUID Multiplexer is a device for the readout of large arrays of low- temperature detectors with a small number of wires. It was motivated by the dramatic growth in array sizes and will provide the necessary multiplexing factors for megapixel arrays of the

Quantum cellular automata based novel unit 2: 1 multiplexer
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ABSTRACT Quantum Cellular Automata (QCA) is an emerging nanotechnology and one of the top six technologies of the future. CMOS technology has a lot of limitations while scaling into a nano-level. QCA technology is a perfect replacement of CMOS technology with no

Design and simulation of a QCA 2 to 1 multiplexer
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In this paper a novel design of a quantum-dot cellular automata (QCA) 2 to 1 multiplexer is presented. The objective is the development of a modular design methodology which can be used to design 2n to 1 multiplexers using building blocks. For the QCA implementation a

Power efficient design of multiplexer using adiabatic logic
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This paper provides low power solutions for Very Large Scale Integration design. The dynamic power consumption of CMOS circuits is rapidly becoming a major concern in VLSI design. By adiabatic technique dynamic power consumption in pull up network can be ABSTRACT A method of realizing arbitrary combinational switching functions with multiplexers is derived. These circuits are divided in two classes where the first allows only uncomplemented variables as control inputs and the second has unrestricted inputs. The

Buffer dimensioning criteria for an ATM multiplexer loaded with homogeneous on-off sources
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In this paper we face the buffer dimensioning issue for an ATM multiplexer , whose input consists of the superposition of homogeneous ON-OFF sources, each modeled by a two- state markovian process. Our approach is based on a simple and accurate analytical model

Quasi-stationary analysis of a finite capacity asynchronous multiplexer with modulated deterministic input
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In this paper a finite capacity multiplexer in ATM environments with modulated deterministic sources is investigated. We consider three cases of input traffic:(1) a fixed number of deterministic cellgenerating sources,(2) a fixed number of sources, each modulated by an

Design of an ATM shaping multiplexer with guaranteed output burstiness
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In order to utilize network resources e ectively while providing satisfactory quality of service (QoS) to all users on the ATM network, it is necessary to control users tra c at the network edges. ATM tra c may be controlled at the User-Network Interface (UNI) and Inter-Network

All-optical digital full adder, decoder and multiplexer by using hardlimiters
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Abstract This paper introduces an all-optical XOR logic gate by using passive optical limiters which are consisting of alternating layers of materials possessing opposite Kerr nonlinearity. It also explores and analyzes an all-optical full adder that can extract the sum

Power analysis dataset for QCA based multiplexer circuits
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abstract Power consumption in irreversible QCA logic circuits is a vital and a major issue; however in the practical cases, this focus is mostly omitted. The complete power depletion dataset of different QCA multiplexers have been worked out in this paper. At À271. 15 C

Design of a multiplexer in multiple logic styles for low power VLSI
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The Low power and low energy has become an important issue in todays consumer electronics. Any combinational circuit can be represented as a multiple inputs with single output. Multiplexers are used to design any digital combinational logic circuit. Hence it is

Optical Add-Drop Multiplexer Based on Fiber Bragg Gratings for Dense Wavelength Division Multiplexing Networks
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Abstract1 A configurable optical add-drop multiplexer (OADM) based on fibre Bragg gratings is reported. Dynamically selection of the add-drop or pass-through functionality is realised according to the control of an optical switch. The OADM performance measurement realised

Low-voltage MOS current mode logic multiplexer
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In this paper, a new low-voltage MOS current mode logic (MCML) multiplexer based on the triple-tail cell concept is proposed. An analytical model for static parameters is formulated and is applied to develop a design approach for the proposed low-voltage MCML

Simulation and analysis of 2: 1 multiplexer circuits at 90nm technology
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ABSTRACT A multiplexer , sometimes referred to as a MUX, is a device that selects between a numbers of input signals. It is a unidirectional device and used in any application in which data must be switched from multiple sources to a destination. This paper represents

Design and Analysis of a High-Performance Packet Multiplexer for Multiservice Networks with Delay Guarantees
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A major challenge for the design of multiservice networks with quahty of service guarantees is an efficient implementation of a bounded delay service, that is, a service that guarantees maximum end-to-end delays for every packet from a single traffic stream. A crucial

A Diffusion Approximation Analysis of an ATM Statistical Multiplexer with Multiple Types of Traffic Part II: Time-Dependent Solutions
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We introduce a diffusion model to approximately characterize a statistical multiplexer for a heterogeneous set of traffic sources, which is a basis for ATM (asynchronous transfer mode) fast packet switching in the future B-ISDN (Broadband Integrated Services Digital Networks)

Design of various Logic gates and Multiplexer in QCA
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As transistors decrease in size more and more of them can be accommodated in a single die, thus increasing chip computational capabilities. However, transistors cannot get much smaller than their current size. The Quantum-dot Cellular Automata (QCA) approach

Design and Implementation of Low Power 4: 1 Multiplexer using Adiabatic Logic
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The main and highly concerned issue in the low power VLSI design circuits is Power dissipation. The basic approaches that we used for reducing energy/power dissipation in conventional CMOS circuits include reducing the supply voltages, on decreasing node



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