processor 2020


A central processing unit, also called a central processor or main processor, is the electronic circuitry within a computer that executes instructions that make up a computer program. The CPU performs basic arithmetic, logic, controlling, and input/output operations specified by the instructions in the program.

The ongoing megatrends in industry and academia like the Internet ofThings (IoT), the Industrial Internet of Things (IIoT) and Cyber-Physical Systems (CPS) present the developers of modern computer architectures with variouschallenges. A novel class of

THERMAL PERFORMANCE AND RELIABILITY OF PROCESSOR INVESTIGATION USING TiO2 AND CuO-WATER NANOFLUIDS
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Continuous miniaturization of feature size, faster operation and high-end performance of processor are facing serious problems to dissipate heat. In this numerical work, the surface temperature of the processor , heat transfer rate, power consumption and reliability of The server models functioning in the industry are required to be more elastic in nature. They are constantly scaling-up and scaling-down on required computation power depending on different conditions. These elastic cloud platforms use accelerators like DSPs, TPUs, GPUs

A digital signal processor (DSP)-based system for embedded continuous-time cuffless blood pressure monitoring using single-channel PPG signal
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Dear editor, According to a 2015 World Health Organization (WHO) report, cardiovascular diseases accounted for the death of approximately 17 million people worldwide each year, ie, 37% of the annual global deaths . Therefore, the prevention and prediction of Developers, in order to quench the needs of powerful yet efficient processors, are developing processors with multiple cores where each core or not serve the same purpose. To achieve that different instruction set architectures (ISAs) are incorporated in Having the end of Moores law and the end of Dennard scaling in mind, this paper looks into current developments in the hardware market. Based on this, it shows the impact of this development on sustained application performance and gives some hints, where future

New 19 Axes Single- Processor System, for Door Moldings Manufacturing
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The present paper describes a new technology for the manufacture of interior door moldings, in the spirit of Industry 4.0. A new manufacturing method is presented, using a single processor for all 19 axes numerically controlled. Thus, production costs are reduced

Network-on-Chip-based Multi- Processor System-on-Chip: Towards Mixed-Criticality System Certification
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The usage of single-core based microprocessors is slowly disappearing, while multicore based devices are becoming the only normally used nowadays. This is true also for the critical domains, like for instance avionics domain. However, the key point for such domains

Bottom-Up and Top-Down Neuromorphic Processor Design: Unveiling Roads to Embedded Cognition
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Together with the development of computers came the promise for exponential integration in silico, known as Moores law, and thus the dream to reach artificial cognition. As a first step toward bio-inspired computation, artificial neural networks (ANNs) take their roots in the

A Simple, Scalable Processor -in-Memory Micro- processor for HPC Systems
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The Problem: There is a need for computer systems which can provide large amounts of computing power to solve problems with enormous requirements in terms of memory, computation, and communication resources. Examples of such problems are protein folding

Implementation of FFT Processor on FPGA
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Various processing applications such as video processing, audio processing, RF signal processing, image processing etc. include computation of transforms such as FFT. Computation of FFT sample is expensive in terms of speed, performance and throughput

Lagarto: First Silicon RISC-V Academic Processor Developed in Spain
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The Lagarto design is a RISC-V general purpose processor capable of booting Linux jointly developed by BSC, CIC-IPN, IMB-CNM, and UPC. The Lagarto processor is the first RISC-V processor designed and fabricated by a Spanish or Mexican academic institution, and will

The ParaNut/RISC-V Processor -An Open, Parallel, and Highly Scalable Processor Architecture for FPGA-based Systems
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The paper presents a customizable, highly scalable, and RISC-V compatible processor architecture for FPGA-based systems. A key aspect of the ParaNut architecture is a special concept of parallelism, which combines advantages of SIMD vectorization and simultaneous

A Parallel Multigrid Solver Based on Processor Virtualization Techniques
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We investigate the use of the processor virtualization technique in parallelizing the multigrid algorithm on high performance computers. By doing processor virtualization, we can achieve adaptive process overlapping, better cache performance, and dynamic load

Implementation and Evaluation of an Embedded Processor for Lightweight IoT eHealth
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Although the rapid growth of Internet of Things (IoT) has enabled new opportunities for eHealth devices, the further development of complex systems is severely constrained by the power and energy supply on the batterypowered embedded systems. To address this issue

Implementation of OFDM with Programmable FFT Processor for Future 5G Communications
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The FFT (Fast Fourier Transform) processor plays a critical part in speed and power consumption of the Orthogonal Frequency Division Multiplexing (OFDM) communication system. This paper presents a high level implementation of a high performance FFT for

An FPGA-based Application-Specific Processor for Implementing the Exponential Function
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In this paper, we present a pipelined, high throughput single precision floating point implementation of the exponential function with a latency of 19 cycles. We also present the Application Specific Processor (ASP), a multiple memory architecture that increases memory

IMPLEMENTATION MEMORY-EFFICIENT RECONFIGURABLE PROCESSOR FOR DEEP LEARNING ALGORITHM ON FPGA
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Machine learning plays an important role in the field of artificial intelligence. Deep learning shows excellent ability in solving complex learning problems than that of machine learning. But, the size of the neural networks, and demand of practical applications possess

Demonstration of quantum delayed-choice experiment using su-perconducting quantum processor
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Developments of quantum technologies enable us to experimentally realize a number of quantum phenomena. Observation of wave-particle morphing behaviour in the context of quantum delayed choice experiment (QDCE) is one of them. Adopting the scheme of QDCE

Compact domain-specific co- processor for accelerating module lattice-based key encapsulation mechanism
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We present a domain-specific co- processor to speed up Saber, a post-quantum key encapsulation mechanism competing on the NIST Post-Quantum Cryptography standardization process. Contrary to most lattice-based schemes, Saber doesnt use NTT


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