Fault Testing and Diagnosis of Sram based FBGA using Built-In-Self-Test-Architecture IJTSRD
A new low-power (LP) scan-based built-in self test (BIST) technique is proposed based on weighted pseudorandom test pattern generation and reseeding. A new LP scan architecture is proposed, which supports both pseudorandom testing and deterministic BIST. During the pseudorandom testing phase, an LP weighted random test pattern generation scheme is proposed by disabling a part […]