Parallel VLSI Architectures
Parallel VLSI Architectures for Multi-Gbps MIMO Communication Systems
FREE-DOWNLOAD [PDF] uY Sun – 2011
VLSI layout view of the LDPC decoder created from high level synthesis Generation
Technology Data rates Year 1G AMPS, TACS 14.4 Kbps ~1981 2G GSM, CDMA, TDMA 144 Kbps
~1995 2.5G
, 2.75G
GPRS, EDGE, CDMA2000 ~200 Kbps ~2000